On Fri, Apr 03, 2015 at 03:44:01PM -0700, Aaron Brice wrote: > You're probably right that the extra Hz are "unlikely" to break > anything. I think they're also unlikely to improve anything noticeably, > what systems do you have where the transfer speed of a SPI device is the > bottleneck? In my case [1], I'm 1000% more concerned about reliability > than throughput for the SPI devices. Reads from flash devices, anything doing firmware downloads... there's probably other examples but those are the ones that spring to mind off the top of my head. > > Can you test on real hardware? I'm pretty sure it's quite hard to find > > something that will not work. > Shouldn't the burden be on you to prove that setting the frequency 8% > higher than the max frequency is safe on all hardware? 8% seems like a huge error especially if that's 8% over, I can't see that being OK for things operating at or near spec. Note also that it's common to see constraints that the SPI clock be strictly less than some other clock.
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