On Tue, Sep 02, 2014 at 05:01:03PM +0800, Barry Song wrote: > in spi interrupt handler, we need check RX_IO_DMA status to ensure > rx fifo have received the specify count data. > if not set, the while statement in spi isr function will keep loop, > at last, make the kernel hang. This changelog says we must check the status in the interrupt handler but... > writel(SIRFSOC_SPI_TXFIFO_EMPTY_INT_EN | > SIRFSOC_SPI_TX_UFLOW_INT_EN | > - SIRFSOC_SPI_RX_OFLOW_INT_EN, > + SIRFSOC_SPI_RX_OFLOW_INT_EN | > + SIRFSOC_SPI_RX_IO_DMA_INT_EN, > sspi->base + SIRFSOC_SPI_INT_EN); > writel(SIRFSOC_SPI_RX_EN | SIRFSOC_SPI_TX_EN, > sspi->base + SIRFSOC_SPI_TX_RX_EN); ...the change is actually just unmasking a bit in the interrupt mask register and doesn't add anything to the interrupt handler? Looking at the code it seems that the actual issue is that the mask register causes the interrupt handler not to see the mask bit since the mask not only disables the interrupt but also causes the bit not to report in the status register. That makes sense so I've applied this but please try to be clear about things like this, it's hard to review code where the changelog doesn't clearly match the code.
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