Re: [PATCH 1/2] spi: cadence: Make sure that clock polarity changes are applied

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On Thu, Jul 10, 2014 at 11:26:28AM +0200, Lars-Peter Clausen wrote:
> It seems that the cadence SPI controller does not immediately change the clock
> polarity setting when writing the CR register. Instead the change is delayed
> until the next transfer starts. This happens after the chip select line has

Applied both, thanks.

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