On Tue, Feb 18, 2014 at 08:37:47PM +0100, Gerhard Sittig wrote: > On Tue, Feb 18, 2014 at 09:09 +0900, Mark Brown wrote: > > It seems fairly clear to me - if we're transferring 16 bit words we need > > the transfer to me a multiple of 16 bits and so on? The requirement for > > padding is unclear I have to say. > I meant "padding" in the sense that e.g. 12bit bits-per-word > require data to be provided or consumed in 16bit quantities (2 > full bytes), 20bit bits-per-word require 4 bytes per SPI word. > Why not 3 bytes? I'd guess this is due to FIFO port width. I do tend to agree that things need to be rounded up just to the nearest byte, I'm not sure what the standard thing for hardware to require in terms of port sizing is here - it's going to need an audit of the users to see if we need to worry and what they do if it is an issue I think. > At least this is how I read the check which this patch > implements. I don't recall the actual code now, sorry - I was mostly just following up on the review comment here.
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