[PATCH 1/4] ssa: add some testcases for mismatched memops

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The SSA conversion is incorrect when the size or offset of the
memory operations doesn't match. It shouldn't be done at all.

So, add a few testcases for this.

Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@xxxxxxxxx>
---
 validation/mem2reg/not-same-memop0.c | 49 ++++++++++++++++++++++++++++
 validation/mem2reg/packed-bitfield.c | 36 ++++++++++++++++++++
 2 files changed, 85 insertions(+)
 create mode 100644 validation/mem2reg/not-same-memop0.c
 create mode 100644 validation/mem2reg/packed-bitfield.c

diff --git a/validation/mem2reg/not-same-memop0.c b/validation/mem2reg/not-same-memop0.c
new file mode 100644
index 000000000000..7a84ddce4efc
--- /dev/null
+++ b/validation/mem2reg/not-same-memop0.c
@@ -0,0 +1,49 @@
+struct s {
+	int:16;
+	short f:6;
+};
+
+static short local(struct s s)
+{
+	return s.f;
+}
+
+static void foo(struct s s)
+{
+	while (s.f) ;
+}
+
+/*
+ * check-name: not-same-memop0
+ * check-command: test-linearize -Wno-decl -fdump-ir=mem2reg $file
+ * check-known-to-fail
+ *
+ * check-output-start
+local:
+.L0:
+	<entry-point>
+	store.32    %arg1 -> 0[s]
+	load.16     %r1 <- 2[s]
+	trunc.6     %r2 <- (16) %r1
+	sext.16     %r3 <- (6) %r2
+	ret.16      %r3
+
+
+foo:
+.L2:
+	<entry-point>
+	store.32    %arg1 -> 0[s]
+	br          .L6
+
+.L6:
+	load.16     %r5 <- 2[s]
+	trunc.6     %r6 <- (16) %r5
+	setne.1     %r7 <- %r6, $0
+	cbr         %r7, .L6, .L5
+
+.L5:
+	ret
+
+
+ * check-output-end
+ */
diff --git a/validation/mem2reg/packed-bitfield.c b/validation/mem2reg/packed-bitfield.c
new file mode 100644
index 000000000000..4eaf0befeaf5
--- /dev/null
+++ b/validation/mem2reg/packed-bitfield.c
@@ -0,0 +1,36 @@
+struct s {
+	int:16;
+	int f:16;
+} __attribute__((__packed__));
+
+static void foo(struct s s)
+{
+	while (s.f)
+		;
+}
+
+/*
+ * check-name: packed-bitfield
+ * check-command: test-linearize -fmem2reg $file
+ * check-known-to-fail
+ *
+ * check-output-contains: store.32
+ * check-output-contains: load.16
+ *
+ * check-output-start
+foo:
+.L0:
+	<entry-point>
+	store.32    %arg1 -> 0[s]
+	br          .L4
+
+.L4:
+	load.16     %r1 <- 2[s]
+	cbr         %r1, .L4, .L3
+
+.L3:
+	ret
+
+
+ * check-output-end
+ */
-- 
2.30.0




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