[v3] * Update KCONFIG select in alphabetical order. * Remove pr_err in set rate. * Fix/update code indentation and logic. * removal of CLK_GET_RATE_NOCACHE completely from RCGs. [v2] * Update KCONFIG to select RATIONAL * Clean up redundant code from dp_set_rate/dp_set_rate_and_parent * Update the disp_cc_mdss_dp_link_clk_src to use the byte2_ops instead of defining the frequencies in KHz. * Clean up CLK_GET_RATE_NOCACHE from various RCGs of DP. [v1] * New display port clock ops supported for display port clocks. * Also add support for the display port related branches and RCGs. Taniya Das (2): clk: qcom: rcg2: Add support for display port clock ops clk: qcom : dispcc: Add support for display port clocks drivers/clk/qcom/Kconfig | 1 + drivers/clk/qcom/clk-rcg.h | 1 + drivers/clk/qcom/clk-rcg2.c | 77 +++++++ drivers/clk/qcom/dispcc-sdm845.c | 214 +++++++++++++++++- .../dt-bindings/clock/qcom,dispcc-sdm845.h | 13 +- 5 files changed, 304 insertions(+), 2 deletions(-) -- Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.