BLSP1 UART2 is used as debug uart on the EVB development board, define
pinmux state for the UART in the platform dtsi and pinconf state for it
in the board dts.
Signed-off-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/qcs404-evb.dtsi | 14 ++++++++++++++
arch/arm64/boot/dts/qcom/qcs404.dtsi | 14 ++++++++++++++
2 files changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
index a39924efebe4..2ed9b0a0e5f2 100644
--- a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
@@ -186,3 +186,17 @@
};
};
};
+
+/* PINCTRL - additions to nodes defined in qcs404.dtsi */
+
+&blsp1_uart2_default {
+ rx {
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ tx {
+ drive-strength = <2>;
+ bias-disable;
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index 9b5c16562bbe..9ec5c85fcb81 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -272,6 +272,18 @@
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+
+ blsp1_uart2_default: blsp1-uart2-default {
+ rx {
+ pins = "gpio18";
+ function = "blsp_uart_rx_a2";
+ };
+
+ tx {
+ pins = "gpio17";
+ function = "blsp_uart_tx_a2";
+ };
+ };
};
gcc: clock-controller@1800000 {
@@ -343,6 +355,8 @@
clock-names = "core", "iface";
dmas = <&blsp1_dma 5>, <&blsp1_dma 4>;
dma-names = "rx", "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&blsp1_uart2_default>;
status = "okay";
};
--
2.18.0
