This series implements the below logic for the GDSCs 1. logic to reset the AON logic before or assert/deassert the block control reset removing the clamp io for few GDSCs on SDM845 SoC. 2. It also introduces the requirement to poll for higher timeout values for few of the GDSCs. 3. There is a new poll register for the GDSCs on SDM845 SoCs which needs to be polled for the correct hardware status of the GDSCs. Amit Nischal (3): clk: qcom: gdsc: Add support to reset AON and block reset logic clk: qcom: gdsc: Add support to poll for higher timeout value clk: qcom: gdsc: Add support to poll CFG register to check GDSC state drivers/clk/qcom/gdsc.c | 77 +++++++++++++++++++++++++++++++++++++++++++++---- drivers/clk/qcom/gdsc.h | 6 +++- 2 files changed, 76 insertions(+), 7 deletions(-) -- Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation. -- To unsubscribe from this list: send the line "unsubscribe linux-soc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
