On 09/28, Abhishek Sahu wrote: > The alpha value calculation function has been written for 40 bit > alpha which is not coming properly for 16 bit > > 1. Alpha value is being calculated on the basis of > ALPHA_BITWIDTH to make the computation easy for 40 bit alpha. > After calculating the 32 bit alpha, It is being converted to 40 > bit alpha by making making lower bits zero. But if actual alpha > register width is less than ALPHA_BITWIDTH, then the actual width > can be used for calculation > > 2. During 40 bit alpha pll set rate, the lower alpha register is > not being configured > > Now the changes have been made to calculate the rate and register > values from alpha_width instead hardcoding it so that it can work > for all the cases. > > Signed-off-by: Abhishek Sahu <absahu@xxxxxxxxxxxxxx> > --- Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe linux-soc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
