On Thu, Jun 06, 2019 at 04:34:52PM +0000, David Laight wrote: > From: Paul E. McKenney > > Sent: 06 June 2019 10:44 > ... > > But m68k is !SMP-only, correct? If so, the only issues would be > > interactions with interrupt handlers and the like, and doesn't current > > m68k hardware use exact interrupts? Or is it still possible to interrupt > > an m68k in the middle of an instruction like it was in the bad old days? > > Hardware interrupts were always on instruction boundaries, the > mid-instruction interrupts would only happen for page faults (etc). OK, !SMP should be fine, then. > There were SMP m68k systems (but I can't remember one). > It was important to continue from a mid-instruction trap on the > same cpu - unless you could guarantee that all the cpus had > exactly the same version of the microcode. Yuck! ;-) > In any case you could probably use the 'cmp2' instruction > for an atomic 64bit write. > OTOH setting that up was such a PITA it was always easier > to disable interrupts. Unless I am forgetting something, given that m68k is a 32-bit system, we should be OK without an atomic 64-bit write. Thanx, Paul _______________________________________________ linux-snps-arc mailing list linux-snps-arc@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/linux-snps-arc
