On Wed, Nov 04, 2020 at 09:04:52PM +0200, Jarkko Sakkinen wrote: > On Wed, Nov 04, 2020 at 07:21:29PM +0100, Borislav Petkov wrote: > > On Wed, Nov 04, 2020 at 04:54:09PM +0200, Jarkko Sakkinen wrote: > > > +static void __init sgx_init(void) > > > +{ > > > + int i; > > > + > > > + if (!boot_cpu_has(X86_FEATURE_SGX)) > > > > Guys, you need to build-test *every* *single* patch - otherwise we break > > bisectability and that is a no-no: > > I've done it quite a few times (every time I've rebased my tree). I did > today too before sending but forgot to redo git format-patch again (was > the very last thing). In my tree the order is: If you want, I can do a resend of this version same time underlining that this the only difference and I do have a framework to check this thing in place. > e987eb0c95dd (HEAD -> master, origin/master, origin/HEAD) x86/sgx: Update MAINTAINERS > 90dc0ee37f44 docs: x86/sgx: Document SGX kernel architecture > 1c2e9bdab128 x86/sgx: Add ptrace() support for the SGX driver > 05ce4345fb5f x86/sgx: Add a page reclaimer > 94c1f778fa09 selftests/x86: Add a selftest for SGX > 741b631d197b x86/vdso: Implement a vDSO for Intel SGX enclave call > 5744b02641ff x86/traps: Attempt to fixup exceptions in vDSO before signaling > e957c7e79dd0 x86/fault: Add helper function to sanitize error code > 96cc520b2bc9 x86/vdso: Add support for exception fixup in vDSO functions > 4aff9d81b2fe x86/sgx: Add SGX_IOC_ENCLAVE_PROVISION > ea9bc917c469 x86/sgx: Add SGX_IOC_ENCLAVE_INIT > 6e61e843291d x86/sgx: Add SGX_IOC_ENCLAVE_ADD_PAGES > 4235ce22235e x86/sgx: Add SGX_IOC_ENCLAVE_CREATE > 681299401c91 x86/sgx: Add SGX misc driver interface > fbd69fd9acf4 mm: Add 'mprotect' hook to struct vm_operations_struct > 93b27a8908aa x86/sgx: Add SGX page allocator functions > 5984a2ca130c x86/cpu/intel: Add nosgx kernel parameter > e131efe5ba06 x86/cpu/intel: Detect SGX support > b0bacb54d36c x86/mm: x86/sgx: Signal SIGSEGV with PF_SGX > 0c64b4c07298 x86/sgx: Initialize metadata for Enclave Page Cache (EPC) sections > 358d17098c4c x86/cpufeatures: x86/msr: Add Intel SGX Launch Control hardware bits > 8f7ab60e5458 x86/cpufeatures: x86/msr: Add Intel SGX hardware bits > 0fb18ca935cf x86/sgx: Add wrappers for ENCLS functions > 3dbc95582baf x86/sgx: Add SGX architectural data structures > > I always do this before I send the patch set (or rebase my tree): > > for x in {23..0} > do > git checkout master~$x > git clean -f -d -x > make tinyconfig && cat >> .config <<EOF > CONFIG_64BIT=y > CONFIG_CRYPTO=y > CONFIG_CRYPTO_SHA256=y > CONFIG_X86_SGX=y > CONFIG_DEBUG_INFO=y > EOF > yes '' | make oldconfig && make CC="ccache gcc" -j$(nproc) || break > git --no-pager log --oneline -1 >> success.txt > done > > The order is the only difference between the patch set and my tree (i.e. > diff's do not conflict between the orderings). /Jarkko