On Fri, Nov 16, 2018 at 03:01:09AM +0200, Jarkko Sakkinen wrote: > From: Kai Huang <kai.huang@xxxxxxxxxxxxxxx> > > X86_FEATURE_SGX reflects whether or not the CPU supports Intel's > Software Guard eXtensions (SGX). > > Signed-off-by: Kai Huang <kai.huang@xxxxxxxxxxxxxxx> > Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@xxxxxxxxxxxxxxx> > --- > arch/x86/include/asm/cpufeatures.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h > index 28c4a502b419..da7fed4939a3 100644 > --- a/arch/x86/include/asm/cpufeatures.h > +++ b/arch/x86/include/asm/cpufeatures.h > @@ -236,6 +236,7 @@ > /* Intel-defined CPU features, CPUID level 0x00000007:0 (EBX), word 9 */ > #define X86_FEATURE_FSGSBASE ( 9*32+ 0) /* RDFSBASE, WRFSBASE, RDGSBASE, WRGSBASE instructions*/ > #define X86_FEATURE_TSC_ADJUST ( 9*32+ 1) /* TSC adjustment MSR 0x3B */ > +#define X86_FEATURE_SGX ( 9*32+ 2) /* Software Guard Extensions */ > #define X86_FEATURE_BMI1 ( 9*32+ 3) /* 1st group bit manipulation extensions */ > #define X86_FEATURE_HLE ( 9*32+ 4) /* Hardware Lock Elision */ > #define X86_FEATURE_AVX2 ( 9*32+ 5) /* AVX2 instructions */ > -- Reviewed-by: Borislav Petkov <bp@xxxxxxx> -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply.