SM8250 (like SM8150 but unlike all other QUP-equipped SoCs) doesn't
provide a qup-core path. Adjust the bindings and drivers as necessary,
and then describe the icc paths in the device tree. This makes it possible
for interconnect sync_state succeed so long as you don't use UFS.
Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
---
Konrad Dybcio (5):
dt-bindings: spi: spi-geni-qcom: Allow no qup-core icc path
dt-bindings: serial: geni-qcom: Allow no qup-core icc path
dt-bindings: i2c: qcom,i2c-geni: Allow no qup-core icc path
soc: qcom: geni-se: Allow any combination of icc paths
arm64: dts: qcom: sm8250: Add interconnects and power-domains to QUPs
.../bindings/i2c/qcom,i2c-geni-qcom.yaml | 27 ++--
.../bindings/serial/qcom,serial-geni-qcom.yaml | 26 ++--
.../bindings/spi/qcom,spi-geni-qcom.yaml | 15 ++-
arch/arm64/boot/dts/qcom/sm8250.dtsi | 150 +++++++++++++++++++++
drivers/soc/qcom/qcom-geni-se.c | 9 +-
5 files changed, 204 insertions(+), 23 deletions(-)
---
base-commit: 296d53d8f84ce50ffaee7d575487058c8d437335
change-id: 20230703-topic-8250_qup_icc-61768a34c7ec
Best regards,
--
Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
