On Thu, Mar 1, 2018 at 11:43 AM Daniel Kurtz <djkurtz@xxxxxxxxxxxx> wrote: > Currently when an earlycon is registered, the uartclk is assumed to be > BASE_BAUD * 16 = 1843200. If a baud rate is specified in the earlycon > options, then 8250_early's init_port will program the UART clock divider > registers based on this assumed uartclk. > However, not all uarts have a UART clock of 1843200. For example, the > 8250_dw uart in AMD's CZ/ST uses a fixed 48 MHz clock (as specified in > cz_uart_desc in acpi_apd.c). Thus, specifying a baud when using earlycon > on such a device will result in incorrect divider values and a wrong UART > clock. > Fix this by extending the earlycon options parameter to allow specification > of a uartclk, like so: > earlycon=uart,mmio32,0xfedc6000,115200,48000000 > If none is specified, fall-back to prior behavior - 1843200. > Signed-off-by: Daniel Kurtz <djkurtz@xxxxxxxxxxxx> This general approach is facing resistance, so trying another more targeted approach to work around the "BASE_BAUD=115200" assumption in arch/x86: https://patchwork.kernel.org/patch/10265587/ -- To unsubscribe from this list: send the line "unsubscribe linux-serial" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
