Hi Clemens, On Sat, Jan 7, 2017 at 11:45 AM, Clemens Gruber <clemens.gruber@xxxxxxxxxxxx> wrote: > It should work like this, I don't think using an extra GPIO is > necessary. The MX6QDL_PAD_CSI0_DAT16__UART4_CTS_B option is only valid in dte mode. If I pass 'fsl,dte-mode' then I can see this pin toggling. (rx, tx would not work as expected). In the default dce mode I can see UART4_CTS_B pin toggling when I monitor CSI0_DAT17 pin and configure it as: MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B ,but unfortunately this pin does not go to the TXEN pin of the RS485 transceiver. So this means that with the hardware I have access to my only alternative is to set MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02. >> So I was never able to observe the DE pin toggling correctly. > > But did you set SER_RS485_RX_DURING_TX in your flags? This is counter > intuitive, but I observed that it would not work otherwise. Yes, I have also tried when I read your email, but did not help on my case. Thanks, Fabio Estevam -- To unsubscribe from this list: send the line "unsubscribe linux-serial" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
