Hi, On Wed, 23 Mar 2016 16:36:38 +0100 Uwe Kleine-König wrote: > Hello, > > I have a problem with an UART on an i.MX25 based machine. I implemented > DCD (and other handshake lines) irq handling[1]. > > Now a user of this patch noticed that DCD handling (at least) is broken. > The problem is that the USR2_DCDDELT bit doesn't clear: > > root@hostname:~ memtool md 0x43f90080+0x34 > 43f90080: 00000000 00004021 0000078c 00004002 ....!@.......@.. > 43f90090: 00000b41 00002040 00005268 0000002b A...@ ..hR..+... > 43f900a0: 00000000 000000bf 00002e62 00000008 ........b....... > 43f900b0: 0000251c .%.. > > root@hostname:~ memtool mw 0x43f90098 0x0x40 ^^^^^^ This looks rather fishy. > root@hostname:~ memtool md 0x43f90080+0x34 > 43f90080: 00000000 00004021 0000078c 00004002 ....!@.......@.. > 43f90090: 00000b41 00002040 00005268 0000002b A...@ ..hR..+... > 43f900a0: 00000000 000000bf 00002e62 00000008 ........b....... > 43f900b0: 0000251c .%.. > > In fact even writing 0xffff doesn't change the register, where I would expect > that the DCDDELT bit (0x40) disappears. I'm sure there is nothing toggling this > line. > Are you sure the clock is enabled when doing your manual tests? Lothar Waßmann -- To unsubscribe from this list: send the line "unsubscribe linux-serial" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html