Hi Dirk, Am Freitag, den 31.07.2015, 08:40 +0200 schrieb Dirk Behme: > On 19.05.2015 14:16, Fabio Estevam wrote: > > Hi Philipp, > > > > On Tue, May 19, 2015 at 5:54 AM, Philipp Zabel <p.zabel@xxxxxxxxxxxxxx> wrote: > >> The driver configures the IDLE condition to interrupt the SDMA engine. > >> Since the SDMA UART ROM script doesn't clear the IDLE bit itself, this > >> caused repeated 1-byte DMA transfers, regardless of available data in the > >> RX FIFO. Also, when returning due to the IDLE condition, the UART ROM > >> script already increased its counter, causing residue to be off by one. > >> > >> This patch clears the IDLE condition to avoid repeated 1-byte DMA transfers > >> and decreases count by when the DMA transfer was aborted due to the IDLE > >> condition, fixing serial transfers using DMA on i.MX6Q. > >> > >> Reported-by: Peter Seiderer <ps.report@xxxxxxx> > >> Signed-off-by: Philipp Zabel <p.zabel@xxxxxxxxxxxxxx> > > > > Thanks for the fix. Tested on a imx6sl-warp, where I could not use DMA > > to access a Bluetooth device using the ROM SDMA firmware. > > > > Tested-by: Fabio Estevam <fabio.estevam@xxxxxxxxxxxxx> > > > > Could you please also Cc stable? > > > Just fyi: We got this patch via -stable, and found that it results in > issues for us. So we had to revert it in our local tree. > > We are using the DMA with baud rates > 2Mbit/s. Having a quick look at > the registers in the ARM Reference Manual, USR2_IDLE seems to be a flag > that is set when the RX line has been idle for at least a defined amount > of time. > > For us this commit is dangerous because it fails to check whether the > IDLE CONDITION feature is being used. We don't use the RX IDLE CONDITION > feature, therefore it is likely to cause the last received character to > be discarded causing corruption of data. > >From your description it's not clear to me why this commit is causing issues for you. The idle condition signaling is automatically enabled when using DMA. The idle signaling should only ever fire if the line has been idle for 32byte durations. The aging timer, that expires after data is sitting in the FIFO for 8 byte durations, should have flushed out all data at this point. Do you use a RAM SDMA firmware or do you rely on the internal one. Can you test with only the ROM firmware enabled? Regards, Lucas -- Pengutronix e.K. | Lucas Stach | Industrial Linux Solutions | http://www.pengutronix.de/ | -- To unsubscribe from this list: send the line "unsubscribe linux-serial" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
