On Mon, Aug 18, 2014 at 11:15:17AM -0400, Peter Hurley wrote: > On 08/15/2014 04:28 PM, Tony Lindgren wrote: > > * Sebastian Andrzej Siewior <bigeasy@xxxxxxxxxxxxx> [140815 12:16]: > >> On 08/15/2014 08:17 PM, Lennart Sorensen wrote: > >> > >>> Are you saying that with the new driver you have to respond to the RX > >>> irq faster than before to avoid overflows? It is not quite clear. > >> > >> Yes. The irq fires 46 bytes giving you 16 bytes buffer before overflow > >> vs 63 bytes buffer the old one had. > >> > >>> I do think 40000 interrupts to handle 40000 bytes of date does seem a > >>> tad inefficient, so dropping to 854 looks a lot nicer. Was the omap > >>> driver not using the fifo trigger levels at all? > >> > >> It configured the trigger levels to 1 for RX and 16 for TX. > > > > Hmm that weird RX trigger level is a workaround for lost characters. > > > > See commit 0ba5f66836 (tty: serial: OMAP: use a 1-byte RX FIFO > > threshold in PIO mode :) > > That commit looks like it should have been specific to the silicon > exhibiting the rx timeout bug. yeah, I'll agree with that. -- balbi
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