Russell, As per my understanding, pass counter helps to identify/break the Deadlock situation and triggers bottom half handler in which Uart controller will be forced to reset (save and restore of UART register happens). It has been found from hardware analysis that race condition(explained in my commit message) was causing the situation to persist (i.e. CTS ack was not happening in spite of W1C), hence, assuming UART controller in deadlock state is wrong. Thanks, Rajanikanth -----Original Message----- From: Russell King - ARM Linux [mailto:linux@xxxxxxxxxxxxxxxx] Sent: Monday, March 26, 2012 1:48 PM To: Linus WALLEIJ Cc: Greg Kroah-Hartman; linux-serial@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; Christophe ARNAL; Guillaume JAUNET; Matthias LOCHER; Chanho Min; Linus Walleij; Rajanikanth H V Subject: Re: [PATCH] serial: pl011: implement workaround for CTS clear event issue On Mon, Mar 26, 2012 at 10:01:08AM +0200, Linus Walleij wrote: > - unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT; > + unsigned int status; Why are you removing the pass counter and associated code, which was there before your work-around patch was applied? -- To unsubscribe from this list: send the line "unsubscribe linux-serial" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
