On Tue, 17 May 2011 16:12:37 -0600 Stephen Warren <swarren@xxxxxxxxxx> wrote: > When a break is received, Tegra's UART apparently fills the FIFO with > 0 bytes. These must be drained so that they aren't interpreted as actual > data received. This allows e.g. MAGIC_SYSRQ to work on Tegra's UARTs. > > v2: Added FIXME comment to clear_rx_fifo Acked-by: Alan Cox <alan@xxxxxxxxxxxxxxx> -- "I'm sure there were advantages to getting older but I've forgotten them" -- To unsubscribe from this list: send the line "unsubscribe linux-serial" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
