On Thursday 24 July 2008, Russell King wrote: > On Thu, Jul 24, 2008 at 02:11:15PM +0200, Laurent Pinchart wrote: > > This patch adds support for memory-mapped 8250-like UARTs on PowerPC > > platforms. > > What is different about in_8() from readb() ? Why can't PowerPC use > readb()? If I'm not mistaken, readb/readw/readl/writeb/writew/writel are PCI accessors, at least on the PowerPC platform. I took a closer look at the read*/write* functions. When both PCI indirect IO and PCI extended error handling are disabled, read*/write* are translated to little-endian MMIO accessors (in_8, in_le16, in_le32, out_8, out_le16, out_le32). This is the case for most embedded PowerPC platforms where a 8250-like UART is likely to be connected directly to the MMIO space. When PCI indirect IO or PCI extended error handling are enabled, the read*/write* functions perform PCI-specific logic. They can't be used as generic MMIO accessors. As my platform (an MPC8248 processor) has no PCI support, and as all 8250 access operations are 8-bit wide, readb/writeb will perform correctly. I suppose we can drop the patch until someone with an embedded PowerPC platform requiring PCI indirect IO or PCI extended error handling comes up and complain. Those platforms are quite unlikely to have a 8250-like UART connected directly to the MMIO space. Best regards, -- Laurent Pinchart CSE Semaphore Belgium Chaussee de Bruxelles, 732A B-1410 Waterloo Belgium T +32 (2) 387 42 59 F +32 (2) 387 42 75
Attachment:
signature.asc
Description: This is a digitally signed message part.
