Re: [PATCH][MIPS][5/6]: AR7: serial hack

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Hi, I wrote:

This is a bit better

is it possible to try without the serial changes first ?

Use

      uart_port[0].type = PORT_16550A;

in arch/mips/ar7/platform.c.

Does it work ?

Tried I get teh usual broken serial output:

I just checked the latest AR7/UR8 source, I have, and they don't need
special hacks. This is a 2.6.10 based tree. At that time there was
no serial8250_console_putchar(), console output was done via
serial8250_console_write() without any helper. Before writing to the UART_TX, wait_for_xmitr() is called. And this wait_for_xmitr() does
check for BOTH_EMPTY.

Is there a good reason, why we don't check for BOTH_EMPTY in
serial8250_console_putchar() ?

I guess transmission will be slower if you check both THRE and TSRE conditions.

... and since TX FIFO is in use, it must be even worse since you're only able to load TX FIFO in the short time slots while TX shift register is empty -- quite possibly that this condition will turn to virtually no TX FIFO as these slots my be to short. BTW, does turning off TX FIFO help?

WBR, Sergei
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