Hi,
Ben Dooks wrote:
On Thu, Jan 03, 2008 at 04:39:16PM +0100, Matthieu CASTET wrote:
use UDIVSLOT register on 2412, to get better accuracy when computing the
baudrate.
Personally, I think the following would have been better:
Improve the accuracy of baud rate generation on the S3C2412 by using the
UDIVSLOT register to acheive better division if the clock does not directly
divide down to the required baud rate.
That's sound better.
Thanks for the re-writing.
The clock generation is divised on 16 slots.
UDIVSLOT : if the bit n is set to 1, then for the slot n the clock generator
divide clock source by (UBRDIV + 2) instead of (UBRDIV + 1).
So if m is the number of bit set to one, the baudrate is
CLOCK / (m*(UBRDIV + 2) + (16-m)*(UBRDIV + 1))
CLOCK / (16*(UBRDIV + 1) + m)
See 2412 datasheet for more info.
I think this could do with re-writing too, but I'll leave that till tommorow.
My only other question is has this been tested on an non S3C2412 CPUs?
No, I only test it on 2412.
Thanks,
Matthieu
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