cciss: need to delay after a PCI Power Management reset After using PCI Power Management to reset the Smart Array in kdump kernels we need some delay. Otherwise we may think the board failed to reset and bail out. This affects all users with a Smart Array P600. From: Mike Miller <mike.miller@xxxxxx> Signed-off-by: Mike Miller <mike.miller@xxxxxx> --- drivers/block/cciss.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/block/cciss.c b/drivers/block/cciss.c index 664c669..1c656db 100644 --- a/drivers/block/cciss.c +++ b/drivers/block/cciss.c @@ -4441,13 +4441,13 @@ static int cciss_controller_hard_reset(struct pci_dev *pdev, pmcsr &= ~PCI_PM_CTRL_STATE_MASK; pmcsr |= PCI_D3hot; pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); - msleep(500); /* enter the D0 power management state */ pmcsr &= ~PCI_PM_CTRL_STATE_MASK; pmcsr |= PCI_D0; pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); + msleep(500); } return 0; } -- To unsubscribe from this list: send the line "unsubscribe linux-scsi" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
