On Wed, 04 May 2011 11:37:35 MDT, Matthew Wilcox said: > > This probably needs a comment like > > /* don't care - dummy read just to force write posting to chipset */ > > or similar. I'm assuming it's just functioning as a barrier-type flush of some sort? > > It's a PCI write flush. It's not clear to me why it's needed here, > though. The write will eventually get to the device; why we need to > make the CPU wait around for it to actually get there doesn't make sense. Exactly why I think it needs a one-liner comment. :)
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