https://bugzilla.kernel.org/show_bug.cgi?id=25192 --- Comment #7 from ralf@xxxxxxxxxxxxxx 2010-12-19 18:04:31 --- 64-bit PCI slots on the Sibyte evaluation boards are implemented using a Hypertransport-to-PCI bridge. Hypertransport however uses a separate port address space from the native 32-bit PCI slots that port x on 32-bit PCI is different from port x on the Hypertransport. Memory mapped I/O is not affected by the issue. The in/out functions don't know which of the busses / port address spaces they're operating on so they're always using the first bus that is the 32-bit PCI bus. Note that the new style API with iomap() / ioreadX() / iowriteX() is not affected by this problem. Would that explain the bug? -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email ------- You are receiving this mail because: ------- You are watching the assignee of the bug. -- To unsubscribe from this list: send the line "unsubscribe linux-scsi" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
