On Fri, 2010-09-17 at 09:41 -0700, Nicholas A. Bellinger wrote:
> > >
> > > What I was actually thinking of for the atomic is that we'd let it range
> > > [1..INT_MAX] so a zero was an indicator of no use of this. Then the
> > > actual code could become
> > >
> > > if (atomic_read(x)) {
> > > do {
> > > y = atomic_add_return(1, x);
> > > } while (y == 0);
> > > }
> >
> > The conversion of struct scsi_cmnd->serial_number to atomic_t and the
> > above code for scsi_cmd_get_serial() sounds perfectly reasonable to me.
> >
>
> Actually, that should be the conversion of struct
> Scsi_Host->cmd_serial_number to an atomic_t. AFAICT there is no reason
> for struct scsi_cmnd->serial_number needing to be an atomic_t.
Just want to verify the hidden assumption we have here when the atomic
int Scsi_Host->cmd_serial_number counter overflow after increment. The
counter itself then becomes negative. We are assuming that when we do
type conversion back to unsigned long scsi_cmnd->serial_number, we will
get the right thing.
So for 32-bit int, we expect if we start with 0x7fffffff in hex and the
expected sequence will be
2147483647 (int) -> 2147483647 (unsigned long) [0x7fffffff]
+1
-2147483648 (int) -> 2147483648 (unsigned long) [0x80000000]
+1
-2147483647 (int) -> 2147483649 (unsigned long) [0x80000001]
If there is architecture where the above assumption is not true (which
I'm not aware of but just checking), then we should manually wrap the
atomic counter to 1 when counter overflow.
Tim
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