On 8/21/2024 5:14 PM, Bart Van Assche wrote:
On 8/21/24 4:26 PM, Bao D. Nguyen wrote:
On 8/21/2024 11:29 AM, Bart Van Assche wrote:
Accessing a host controller register after the host controller has
entered the hibernation state may cause the host controller to exit the
hibernation state. Hence rework the hibernation entry code such that it
does not modify the interrupt enabled status. Bart,
>
I am not clear on the offending condition, particularly the term
"hibernation" used in this context. In the function
ufshcd_uic_pwr_ctrl() where you are making the change, the host
controller is fully active at this point, right?
Please help me clarify the issue.
Hi Bao,
Isn't "hibernation" terminology that comes from the M-PHY standard?
See also the DME_HIBERNATE_ENTER and DME_HIBERNATE_EXIT constants in
the UFSHCI driver source code. Please let me know if you need more
information.
I see. Thanks Bart.
If I understand correctly, the link is hibernated because we had a
successful ufshcd_uic_hibern8_enter() earlier. Then the
ufshcd_uic_pwr_ctrl() is invoked probably from a power mode change
command? (a callstack would be helpful in this case).
Anyway, accessing the UFSHCI host controller registers space somehow
affected the M-PHY link state? If my understanding is correct, it seems
like a hardware issue that we are trying to work around?
Thanks, Bao
