Re: [PATCH] aic94xx: fix SSP IU status print-out

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On Tue, 2007-10-02 at 10:48 -0400, Jeff Garzik wrote:
> James Bottomley wrote:
> > On Tue, 2007-10-02 at 10:35 -0400, Jeff Garzik wrote:
> >> James Bottomley wrote:
> >>> On Tue, 2007-10-02 at 08:29 -0400, Jeff Garzik wrote:
> >>>> James, what is the upstream status of my two aic94xx bug fixes?
> >>>>
> >>>> Have they been sent to Linus yet?
> >>>>
> >>>> Since you seem M.I.A., I'll send them upstream if I do not hear from you 
> >>>> today.
> >>> They're hardly -rc8 critical bug fixes, since no-one has noticed their
> >>> effects for about 5 kernel releases.  I'll stick them into scsi-misc
> >>> with the rest of the pending stuff.
> >> Except for those people who want SMP to work, on platforms where 
> >> TODEVICE actually matters.
> > 
> > And the number of bug reports on this?
> > 
> >> I'll send them upstream myself.
> > 
> > No, you won't; because that would be completely irresponsible.  You
> > don't turn code for no reason at the last minute unless it's essential
> > because of the danger of introducing inadvertent bugs along with the
> > changes.  Since there are no users affected, there's zero benefit and
> > there is a potential non-zero detriment to the code turn.
> > 
> > There's absolutely no reason to rush these into the release at the last
> > minute.  The correct path is via scsi-misc and then to be backported
> > into the stable series once we're sure they're OK.
> 
> What's irresponsible is holding onto simple, obvious bug fixes that 
> obviously break certain scenarios.

Those scenarios don't exist.  I spent quite a while with Adaptec trying
to get this card to work on non-x86 platforms.  There's a bug which
manifests as the driver decides the card hasn't been setup by bios and
it tries to write the OCF parameters itself ... on non-x86 platforms
this always ends up inducing a master abort on the PCI bus for no
explicable reason (and it's not the code you're fixing, it happens way
before this).  There is actually an ia64 box at Adaptec which exhibits
the problem ... and they're trying to trace the PCI bus transactions.
The fascinating thing will be to see if this also shows up in the
Calgary when we get all of that working.

So I know, beyond a shadow of a doubt, that there are no non-x86 users
of this.

James


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