> From: Peter Wang <peter.wang@xxxxxxxxxxxx> > > Mediatek tx skew issue fix by check dts setting and vendor/model. > Then set PA_TACTIVATE set 8 > > Signed-off-by: Peter Wang <peter.wang@xxxxxxxxxxxx> > --- > drivers/ufs/host/ufs-mediatek.c | 21 +++++++++++++++++++++ > drivers/ufs/host/ufs-mediatek.h | 1 + > 2 files changed, 22 insertions(+) > > diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c > index 6fc6fa2ea5bd..0262e8994236 100644 > --- a/drivers/ufs/host/ufs-mediatek.c > +++ b/drivers/ufs/host/ufs-mediatek.c > @@ -119,6 +119,13 @@ static bool ufs_mtk_is_pmc_via_fastauto(struct > ufs_hba *hba) > return !!(host->caps & UFS_MTK_CAP_PMC_VIA_FASTAUTO); } > > +static bool ufs_mtk_is_tx_skew_fix(struct ufs_hba *hba) { > + struct ufs_mtk_host *host = ufshcd_get_variant(hba); > + > + return !!(host->caps & UFS_MTK_CAP_TX_SKEW_FIX); } > + > static bool ufs_mtk_is_allow_vccqx_lpm(struct ufs_hba *hba) { > struct ufs_mtk_host *host = ufshcd_get_variant(hba); @@ -630,6 +637,9 > @@ static void ufs_mtk_init_host_caps(struct ufs_hba *hba) > if (of_property_read_bool(np, "mediatek,ufs-pmc-via-fastauto")) > host->caps |= UFS_MTK_CAP_PMC_VIA_FASTAUTO; > > + if (of_property_read_bool(np, "mediatek,ufs-tx-skew-fix")) > + host->caps |= UFS_MTK_CAP_TX_SKEW_FIX; > + > dev_info(hba->dev, "caps: 0x%x", host->caps); } > > @@ -1423,6 +1433,17 @@ static int ufs_mtk_apply_dev_quirks(struct ufs_hba > *hba) > if (mid == UFS_VENDOR_SAMSUNG) { > ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 6); > ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME), 10); > + } else if (mid == UFS_VENDOR_MICRON) { Is this a quirk for micron? Why not implemented as a quirk? And go for all this trouble setting it in the dt etc. Thanks, Avri > + /* Only for the host which have TX skew issue */ > + if (ufs_mtk_is_tx_skew_fix(hba) && > + (STR_PRFX_EQUAL("MT128GBCAV2U31", dev_info->model) || > + STR_PRFX_EQUAL("MT256GBCAV4U31", dev_info->model) || > + STR_PRFX_EQUAL("MT512GBCAV8U31", dev_info->model) || > + STR_PRFX_EQUAL("MT256GBEAX4U40", dev_info->model) || > + STR_PRFX_EQUAL("MT512GAYAX4U40", dev_info->model) || > + STR_PRFX_EQUAL("MT001TAYAX8U40", dev_info->model))) { > + ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 8); > + } > } > > /* > diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-mediatek.h > index 0720da2f1402..146c25080599 100644 > --- a/drivers/ufs/host/ufs-mediatek.h > +++ b/drivers/ufs/host/ufs-mediatek.h > @@ -142,6 +142,7 @@ enum ufs_mtk_host_caps { > */ > UFS_MTK_CAP_ALLOW_VCCQX_LPM = 1 << 5, > UFS_MTK_CAP_PMC_VIA_FASTAUTO = 1 << 6, > + UFS_MTK_CAP_TX_SKEW_FIX = 1 << 7, > }; > > struct ufs_mtk_crypt_cfg { > -- > 2.18.0