On Tue, Jan 02, 2024 at 10:42:22AM +0900, Chanwoo Lee wrote: > From: ChanWoo Lee <cw9316.lee@xxxxxxxxxxx> > > Instead of hardcoding the register field, add the proper definition. While > at it, let's also use ufshcd_rmwl() to simplify updating this register. > > Reviewed-by: Peter Wang <peter.wang@xxxxxxxxxxxx> > Signed-off-by: ChanWoo Lee <cw9316.lee@xxxxxxxxxxx> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> - Mani > --- > * v2->v3: Change subject and description > v2 : https://patchwork.kernel.org/project/linux-scsi/patch/20231221065608.9899-1-cw9316.lee@xxxxxxxxxxx/ > > * v1->v2: > v1 : https://patchwork.kernel.org/project/linux-scsi/patch/20231220052737.19857-1-cw9316.lee@xxxxxxxxxxx/ > 1) Excluding ESI_ENABLE > 2) Replace with ufshcd_rmwl, BIT() > 3) Separating hba->mcq_enabled > --- > drivers/ufs/core/ufs-mcq.c | 6 ++++++ > drivers/ufs/core/ufshcd.c | 4 +--- > drivers/ufs/host/ufs-mediatek.c | 4 +--- > include/ufs/ufshcd.h | 1 + > include/ufs/ufshci.h | 3 +++ > 5 files changed, 12 insertions(+), 6 deletions(-) > > diff --git a/drivers/ufs/core/ufs-mcq.c b/drivers/ufs/core/ufs-mcq.c > index 0787456c2b89..edc752e55878 100644 > --- a/drivers/ufs/core/ufs-mcq.c > +++ b/drivers/ufs/core/ufs-mcq.c > @@ -399,6 +399,12 @@ void ufshcd_mcq_enable_esi(struct ufs_hba *hba) > } > EXPORT_SYMBOL_GPL(ufshcd_mcq_enable_esi); > > +void ufshcd_mcq_enable(struct ufs_hba *hba) > +{ > + ufshcd_rmwl(hba, MCQ_MODE_SELECT, MCQ_MODE_SELECT, REG_UFS_MEM_CFG); > +} > +EXPORT_SYMBOL_GPL(ufshcd_mcq_enable); > + > void ufshcd_mcq_config_esi(struct ufs_hba *hba, struct msi_msg *msg) > { > ufshcd_writel(hba, msg->address_lo, REG_UFS_ESILBA); > diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c > index ae9936fc6ffb..30df6f6a72c6 100644 > --- a/drivers/ufs/core/ufshcd.c > +++ b/drivers/ufs/core/ufshcd.c > @@ -8723,9 +8723,7 @@ static void ufshcd_config_mcq(struct ufs_hba *hba) > hba->host->can_queue = hba->nutrs - UFSHCD_NUM_RESERVED; > hba->reserved_slot = hba->nutrs - UFSHCD_NUM_RESERVED; > > - /* Select MCQ mode */ > - ufshcd_writel(hba, ufshcd_readl(hba, REG_UFS_MEM_CFG) | 0x1, > - REG_UFS_MEM_CFG); > + ufshcd_mcq_enable(hba); > hba->mcq_enabled = true; > > dev_info(hba->dev, "MCQ configured, nr_queues=%d, io_queues=%d, read_queue=%d, poll_queues=%d, queue_depth=%d\n", > diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c > index fc61790d289b..1048add66419 100644 > --- a/drivers/ufs/host/ufs-mediatek.c > +++ b/drivers/ufs/host/ufs-mediatek.c > @@ -1219,9 +1219,7 @@ static int ufs_mtk_link_set_hpm(struct ufs_hba *hba) > ufs_mtk_config_mcq(hba, false); > ufshcd_mcq_make_queues_operational(hba); > ufshcd_mcq_config_mac(hba, hba->nutrs); > - /* Enable MCQ mode */ > - ufshcd_writel(hba, ufshcd_readl(hba, REG_UFS_MEM_CFG) | 0x1, > - REG_UFS_MEM_CFG); > + ufshcd_mcq_enable(hba); > } > > if (err) > diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h > index d862c8ddce03..a96c45fa4b4b 100644 > --- a/include/ufs/ufshcd.h > +++ b/include/ufs/ufshcd.h > @@ -1257,6 +1257,7 @@ unsigned long ufshcd_mcq_poll_cqe_lock(struct ufs_hba *hba, > struct ufs_hw_queue *hwq); > void ufshcd_mcq_make_queues_operational(struct ufs_hba *hba); > void ufshcd_mcq_enable_esi(struct ufs_hba *hba); > +void ufshcd_mcq_enable(struct ufs_hba *hba); > void ufshcd_mcq_config_esi(struct ufs_hba *hba, struct msi_msg *msg); > > int ufshcd_opp_config_clks(struct device *dev, struct opp_table *opp_table, > diff --git a/include/ufs/ufshci.h b/include/ufs/ufshci.h > index d5accacae6bc..2a6989a70671 100644 > --- a/include/ufs/ufshci.h > +++ b/include/ufs/ufshci.h > @@ -282,6 +282,9 @@ enum { > /* UTMRLRSR - UTP Task Management Request Run-Stop Register 80h */ > #define UTP_TASK_REQ_LIST_RUN_STOP_BIT 0x1 > > +/* REG_UFS_MEM_CFG - Global Config Registers 300h */ > +#define MCQ_MODE_SELECT BIT(0) > + > /* CQISy - CQ y Interrupt Status Register */ > #define UFSHCD_MCQ_CQIS_TAIL_ENT_PUSH_STS 0x1 > > -- > 2.29.0 > -- மணிவண்ணன் சதாசிவம்
