[PATCH] mpi3mr: soft reset in progress fault code (0xF002) handling

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The driver is exiting from the fault watchdog thread if it
sees the 0xF002 (Soft reset in progress) fault code,  If the
driver initiates the soft reset, then the driver restarts the
watchdog at the end of the soft reset completion.  However, if
the soft reset is initiated by the firmware asynchronously then
the driver will never restart the watchdog and never re-initialize
the controller after the asynchronous soft reset completion.

Signed-off-by: Ranjan Kumar <ranjan.kumar@xxxxxxxxxxxx>
---
 drivers/scsi/mpi3mr/mpi3mr_fw.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/scsi/mpi3mr/mpi3mr_fw.c b/drivers/scsi/mpi3mr/mpi3mr_fw.c
index a565817aa56d..d109a4ceb72b 100644
--- a/drivers/scsi/mpi3mr/mpi3mr_fw.c
+++ b/drivers/scsi/mpi3mr/mpi3mr_fw.c
@@ -2526,7 +2526,7 @@ static void mpi3mr_watchdog_work(struct work_struct *work)
 		mrioc->unrecoverable = 1;
 		goto schedule_work;
 	case MPI3_SYSIF_FAULT_CODE_SOFT_RESET_IN_PROGRESS:
-		return;
+		goto schedule_work;
 	case MPI3_SYSIF_FAULT_CODE_CI_ACTIVATION_RESET:
 		reset_reason = MPI3MR_RESET_FROM_CIACTIV_FAULT;
 		break;
-- 
2.31.1

Attachment: smime.p7s
Description: S/MIME Cryptographic Signature


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