On 24/10/2022 14:10, Niklas Cassel wrote:
At least on the HoneyComb LX2,
running with "arm-smmu.disable_bypass=0 iommu.passthrough=1" gives a working
system (and working pm80xx).
The ACPI IOMMU code that parses the ACPI IORT RMR revision E.d node
was first included in kernel v6.0:
https://lore.kernel.org/linux-iommu/20220615101044.1972-1-shameerali.kolothum.thodi@xxxxxxxxxx/
However, the HoneyComb edk2-platforms code has not yet been updated to add
a ACPI IORT RMR revision E.d node.
Considering that it works with "arm-smmu.disable_bypass=0 iommu.passthrough=1",
I assume that the ACPI IORT RMR node basically just defines a number of
memory regions which the IOMMU should treat as "bypass", while all other
memory has to be re-mapped via the IOMMU as per usual.
Hi Niklas,
As I expected, unfortunately that did not help. Note that I actually
can't use passthrough on my platform due to SMMUv3 implementation bug,
so I just disable SMMUv3 entirely via kernel config.
I'm still betting on a memory ordering issue for me.
Thanks again,
John
