On 19/02/2022 19:42, Krzysztof Kozlowski wrote:
> Convert the Cadence Universal Flash Storage (UFS) Controlle to DT schema
> format.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxx>
> ---
> .../devicetree/bindings/ufs/cdns,ufshc.txt | 32 -----------
> .../devicetree/bindings/ufs/cdns,ufshc.yaml | 56 +++++++++++++++++++
> 2 files changed, 56 insertions(+), 32 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
> create mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
>
> diff --git a/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt b/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
> deleted file mode 100644
> index 02347b017abd..000000000000
> --- a/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
> +++ /dev/null
> @@ -1,32 +0,0 @@
> -* Cadence Universal Flash Storage (UFS) Controller
> -
> -UFS nodes are defined to describe on-chip UFS host controllers.
> -Each UFS controller instance should have its own node.
> -Please see the ufshcd-pltfrm.txt for a list of all available properties.
> -
> -Required properties:
> -- compatible : Compatible list, contains one of the following controllers:
> - "cdns,ufshc" - Generic CDNS HCI,
> - "cdns,ufshc-m31-16nm" - CDNS UFS HC + M31 16nm PHY
> - complemented with the JEDEC version:
> - "jedec,ufs-2.0"
> -
> -- reg : Address and length of the UFS register set.
> -- interrupts : One interrupt mapping.
> -- freq-table-hz : Clock frequency table.
> - See the ufshcd-pltfrm.txt for details.
> -- clocks : List of phandle and clock specifier pairs.
> -- clock-names : List of clock input name strings sorted in the same
> - order as the clocks property. "core_clk" is mandatory.
> - Depending on a type of a PHY,
> - the "phy_clk" clock can also be added, if needed.
> -
> -Example:
> - ufs@fd030000 {
> - compatible = "cdns,ufshc", "jedec,ufs-2.0";
> - reg = <0xfd030000 0x10000>;
> - interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH>;
> - freq-table-hz = <0 0>, <0 0>;
> - clocks = <&ufs_core_clk>, <&ufs_phy_clk>;
> - clock-names = "core_clk", "phy_clk";
> - };
> diff --git a/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml b/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
> new file mode 100644
> index 000000000000..68ae5663cd25
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
> @@ -0,0 +1,56 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/ufs/cdns,ufshc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Cadence Universal Flash Storage (UFS) Controller
> +
> +maintainers:
> + - Jan Kotas <jank@xxxxxxxxxxx>
> +
This will require a "select:" to avoid clash with qcom (and maybe other)
schemas.
Best regards,
Krzysztof
