Hi Bart,
>From arch/arm/include/asm/io.h
>
> #define __iowmb() wmb()
> [ ... ]
> #define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); })
>
>From Documentation/memory-barriers.txt: "Note that, when using writel(), a
>prior wmb() is not needed to guarantee that the cache coherent memory
>writes have completed before writing to the MMIO region."
>
>In other words, calling wmb() before writel() is not necessary. Hence
>remove the wmb() calls that precede a writel() call. Remove the wmb()
>calls that precede a ufshcd_send_command() call since the latter function
>uses writel(). Remove the wmb() call from ufshcd_wait_for_dev_cmd()
>since the following chain of events guarantees that the CPU will see
>up-to-date LRB values:
>* UFS controller writes to host memory.
>* UFS controller posts completion interrupt after the memory writes from
> the previous step are visible to the CPU.
>* complete(hba->dev_cmd.complete) is called from the UFS interrupt handler.
>* The wait_for_completion(hba->dev_cmd.complete) call in
> ufshcd_wait_for_dev_cmd() returns.
Reviewed-by: Daejun Park <daejun7.park@xxxxxxxxxxx>
Thanks,
Daejun
