On 2020-05-15 03:30, Avri Altman wrote: > NAND flash-based storage devices, needs to translate the logical > addresses of the IO requests to its corresponding physical addresses of > the flash storage. As the internal SRAM of the storage device cannot > accommodate the entire L2P mapping table, the device can only partially > load the L2P data it needs based on the incoming LBAs. As a result, > cache misses - which are more frequent in random read access, can result > in serious performance degradation. To remedy the above, UFS3.1 offers > the Host Performance Booster (HPB) feature, which uses the host’s system > memory as a cache for L2P map data. The basic concept of HPB is to > cache L2P mapping entries in host system memory so that both physical > block address (PBA) and logical block address (LBA) can be delivered in > HPB read command. Not to be confused with host-managed-FTL, HPB is > merely about NAND flash cost reduction. > > HPB, by its nature, imposes an interesting question regarding the proper > location of its components across the storage stack. On Init it requires > to detect the HPB capabilities and parameters, which can be only done > from the LLD level. On the other hand, it requires to send scsi > commands as part of its cache management, which preferably should be > done from scsi mid-layer, and compose the "HPB_READ" command, which > should be done as part of scsi command setup path. > Therefore, we came up with a 2 module layout: ufshpb in the ufs driver, > and scsi_dh_ufshpb under scsi device handler. > > The ufshpb module bear 2 main duties. During initialization, it reads > the hpb configuration from the device. Later on, during the scan host > phase, it attaches the scsi device and activates the scsi hpb device > handler. The second duty mainly concern supporting the HPB cache > management. The scsi hpb device handler will perform the cache > management and send the HPB_READ command. The modules will communicate > via the standard device handler API: the handler_data opaque pointer, > and the set_params op-mode. > > This series has borrowed heavily from a HPB implementation that was > published as part of the pixel3 code, authored by: > Yongmyung Lee <ymhungry.lee@xxxxxxxxxxx> and > Jinyoung Choi <j-young.choi@xxxxxxxxxxx>. > > We kept some of its design and implementation details. We made some > minor modifications to adopt the latest spec changes (HPB1.0 was not > close when the driver initially published), and also divide the > implementation between the scsi handler and the ufs modules, instead of > a single module in the original driver, which simplified the > implementation to a great deal and resulted in far less code. One more > big difference is that the Pixel3 driver support device managed mode, > while we are supporting host managed mode, which reflect heavily on the > cache management decision process. Hi Avri, Thank you for having taken the time to publish your work. The way this series has been split into individual patches makes reviewing easy. Additionally, the cover letter and patch descriptions are very informative, insightful and well written. However, I'm concerned about a key aspect of the implementation, namely relying on a device handler to alter the meaning of a block layer request. My concern about this approach is that at most one device handler can be associated with a SCSI LLD. If in the future more functionality would be added to the UFS spec and if it would be desirable to implement that functionality as a new kernel module, it won't be possible to implement that functionality as a new device handler. So I think that not relying on the device handler infrastructure is more future proof because that removes the restrictions we have to deal with when using the device handler framework. Thanks, Bart.
