On Thu, 14 Nov 2019, Kars de Jong wrote:
> The FSC (NCR53CF9x-2 / SYM53CF9x-2) has a different family code than QLogic
> or Emulex parts. This caused it to be detected as a FAS100A.
>
> Unforunately, this meant the configuration of the CONFIG3 register was
> incorrect. This causes data transfer issues with FAST-SCSI targets.
>
> The FSC also has the CONFIG4 register. It can be used to enable a feature
> called Active Negation which should always be enabled according to the data
> manual.
>
> Signed-off-by: Kars de Jong <jongk@xxxxxxxxxxxxxx>
Reviewed-by: Finn Thain <fthain@xxxxxxxxxxxxxxxxxxx>
A few observations follow. Not a NAK, just FYI...
> ---
> drivers/scsi/esp_scsi.c | 19 ++++++++++++-------
> drivers/scsi/esp_scsi.h | 24 ++++++++++++++++--------
> 2 files changed, 28 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/scsi/esp_scsi.c b/drivers/scsi/esp_scsi.c
> index 4fc3eee3138b..e887ea3e514a 100644
> --- a/drivers/scsi/esp_scsi.c
> +++ b/drivers/scsi/esp_scsi.c
> @@ -243,7 +243,7 @@ static void esp_set_all_config3(struct esp *esp, u8 val)
> /* Reset the ESP chip, _not_ the SCSI bus. */
> static void esp_reset_esp(struct esp *esp)
> {
> - u8 family_code, version;
> + u8 family_code;
>
This is not the best scope for this variable. You have to touch both lines
(declaration and initialization) anyway, so you can easily improve this.
> /* Now reset the ESP chip */
> scsi_esp_cmd(esp, ESP_CMD_RC);
> @@ -257,13 +257,16 @@ static void esp_reset_esp(struct esp *esp)
> */
> esp->max_period = ((35 * esp->ccycle) / 1000);
> if (esp->rev == FAST) {
> - version = esp_read8(ESP_UID);
> - family_code = (version & 0xf8) >> 3;
> - if (family_code == 0x02)
> + family_code = ESP_FAMILY(esp_read8(ESP_UID));
> + if (family_code == ESP_UID_F236)
> esp->rev = FAS236;
> - else if (family_code == 0x0a)
> + else if (family_code == ESP_UID_HME)
> esp->rev = FASHME; /* Version is usually '5'. */
> - else
> + else if (family_code == ESP_UID_FSC) {
> + esp->rev = FSC;
> + /* Enable Active Negation */
> + esp_write8(ESP_CONFIG4_RADE, ESP_CFG4);
> + } else
> esp->rev = FAS100A;
> esp->min_period = ((4 * esp->ccycle) / 1000);
> } else {
> @@ -308,7 +311,8 @@ static void esp_reset_esp(struct esp *esp)
>
> case FAS236:
> case PCSCSI:
> - /* Fast 236, AM53c974 or HME */
> + case FSC:
> + /* Fast 236, AM53c974, FSC or HME */
This comment merely re-states the logic in the case labels. If you don't
delete the comment, it has to be maintained along with the case labels.
Consequently this patch is longer than it needs to be.
> esp_write8(esp->config2, ESP_CFG2);
> if (esp->rev == FASHME) {
> u8 cfg3 = esp->target[0].esp_config3;
> @@ -2374,6 +2378,7 @@ static const char *esp_chip_names[] = {
> "ESP236",
> "FAS236",
> "AM53C974",
> + "FSC",
> "FAS100A",
> "FAST",
> "FASHME",
> diff --git a/drivers/scsi/esp_scsi.h b/drivers/scsi/esp_scsi.h
> index f764d64e1f25..a673dec1b8a1 100644
> --- a/drivers/scsi/esp_scsi.h
> +++ b/drivers/scsi/esp_scsi.h
> @@ -78,12 +78,14 @@
> #define ESP_CONFIG3_IMS 0x80 /* ID msg chk'ng (esp/fas236) */
> #define ESP_CONFIG3_OBPUSH 0x80 /* Push odd-byte to dma (hme) */
>
> -/* ESP config register 4 read-write, found only on am53c974 chips */
> -#define ESP_CONFIG4_RADE 0x04 /* Active negation */
> -#define ESP_CONFIG4_RAE 0x08 /* Active negation on REQ and ACK */
> -#define ESP_CONFIG4_PWD 0x20 /* Reduced power feature */
> -#define ESP_CONFIG4_GE0 0x40 /* Glitch eater bit 0 */
> -#define ESP_CONFIG4_GE1 0x80 /* Glitch eater bit 1 */
> +/* ESP config register 4 read-write, found on am53c974 and FSC chips */
> +#define ESP_CONFIG4_BBTE 0x01 /* Back-to-back transfers (fsc) */
> +#define ESP_CONGIG4_TEST 0x02 /* Transfer counter test mode (fsc) */
> +#define ESP_CONFIG4_RADE 0x04 /* Active negation (am53c974/fsc) */
> +#define ESP_CONFIG4_RAE 0x08 /* Act. negation REQ/ACK (am53c974) */
> +#define ESP_CONFIG4_PWD 0x20 /* Reduced power feature (am53c974) */
> +#define ESP_CONFIG4_GE0 0x40 /* Glitch eater bit 0 (am53c974) */
> +#define ESP_CONFIG4_GE1 0x80 /* Glitch eater bit 1 (am53c974) */
>
You've added "(FSC)" and "(am53c974)" here, which is fine but you've
repeated yourself in the comment, "found on am53c974 and FSC chips". The
DRY principle applies here too (Don't Repeat Yourself).
> #define ESP_CONFIG_GE_12NS (0)
> #define ESP_CONFIG_GE_25NS (ESP_CONFIG_GE1)
> @@ -209,10 +211,15 @@
> #define ESP_TEST_TS 0x04 /* Tristate test mode */
>
> /* ESP unique ID register read-only, found on fas236+fas100a only */
> +#define ESP_UID_FAM 0xf8 /* ESP family bitmask */
> +
> +#define ESP_FAMILY(uid) (((uid) & ESP_UID_FAM) >> 3)
> +
> +/* Values for the ESP family bits */
> #define ESP_UID_F100A 0x00 /* ESP FAS100A */
> #define ESP_UID_F236 0x02 /* ESP FAS236 */
> -#define ESP_UID_REV 0x07 /* ESP revision */
> -#define ESP_UID_FAM 0xf8 /* ESP family */
> +#define ESP_UID_HME 0x0a /* FAS HME */
> +#define ESP_UID_FSC 0x14 /* NCR/Symbios Logic FSC */
>
> /* ESP fifo flags register read-only */
> /* Note that the following implies a 16 byte FIFO on the ESP. */
> @@ -264,6 +271,7 @@ enum esp_rev {
> ESP236,
> FAS236,
> PCSCSI, /* AM53c974 */
> + FSC, /* NCR/Symbios Logic FSC */
Is there a difference between "FSC" and "NCR/Symbios Logic FSC"? The
reader has to infer that not all "FSC" chips are equivalent and that the
brand name is significant. Whereas, there is real value in putting a part
code here (as in the line above).
--
> FAS100A,
> FAST,
> FASHME,
>
