From: Can Guo <cang@xxxxxxxxxxxxxx> Host sends MODE_SENSE_10 with caching mode page, to check if the device supports the cache feature. UFS standards requires DBD field to be set to 1. Some card vendors are more strict and check the DBD field, hence respond with CHECK_CONDITION (Sense key set to ILLEGAL_REQUEST and ASC set to INVALID FIELD IN CDB). As a result of the CHECK_CONDITION response, host assumes that the device doesn't support the cache feature and doesn't send SYNCHRONIZE_CACHE commands to flush the device cache. This can result in data corruption in case of sudden power down, when there is data stored in the device cache. This patch fixes the DBD field setting in case of caching mode page. Signed-off-by: Can Guo <cang@xxxxxxxxxxxxxx> --- drivers/scsi/ufs/ufshcd.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index 0026199..0a6b8f9 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -8353,6 +8353,7 @@ int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq) host->max_channel = UFSHCD_MAX_CHANNEL; host->unique_id = host->host_no; host->max_cmd_len = UFS_CDB_SIZE; + host->set_dbd_for_caching = 1; hba->max_pwr_info.is_valid = false; -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
