On Sat, Oct 13, 2018 at 11:26 AM tedheadster <tedheadster@xxxxxxxxx> wrote:
>
> > it seems like we do for some reason never actually enable swiotlb
> > for 32-bit x86. Before my commit the block bounce buffering papered
> > over that for networking, Please try this patch:
> >
> > diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
> > index 661583662430..71c0b01d93b1 100644
> > --- a/arch/x86/kernel/pci-swiotlb.c
> > +++ b/arch/x86/kernel/pci-swiotlb.c
> > @@ -42,10 +42,8 @@ IOMMU_INIT_FINISH(pci_swiotlb_detect_override,
> > int __init pci_swiotlb_detect_4gb(void)
> > {
> > /* don't initialize swiotlb if iommu=off (no_iommu=1) */
> > -#ifdef CONFIG_X86_64
> > if (!no_iommu && max_possible_pfn > MAX_DMA32_PFN)
> > swiotlb = 1;
> > -#endif
> >
> > /*
> > * If SME is active then swiotlb will be set to 1 so that bounce
>
> Christoph,
> your patch fixed it nicely. No more error messages when I boot with
> 16GiB enabled on a 32-bit PAE-enabled system.
Christoph,
can you please submit this patch to be backported to the long-term
kernels (4.14, 4.9, 4.4, 3.18, and 3.16)?
- Matthew
