On Thu, 2019-03-28 at 10:10 -0700, Himanshu Madhani wrote: +AD4 From: Giridhar Malavali +ADw-gmalavali+AEA-marvell.com+AD4 +AD4 +AD4 This patch increases max+AF8-sgl+AF8-segments value to max supported +AD4 which is 1024. Increase in max+AF8-sgl+AF8-segments will support larger +AD4 IO size from driver. +AD4 +AD4 Signed-off-by: Giridhar Malavali +ADw-gmalavali+AEA-marvell.com+AD4 +AD4 Signed-off-by: Himanshu Madhani +ADw-hmadhani+AEA-marvell.com+AD4 +AD4 --- +AD4 drivers/scsi/qla2xxx/qla+AF8-nvme.c +AHw 2 +- +AD4 1 file changed, 1 insertion(), 1 deletion(-) +AD4 +AD4 diff --git a/drivers/scsi/qla2xxx/qla+AF8-nvme.c b/drivers/scsi/qla2xxx/qla+AF8-nvme.c +AD4 index 41c85da3ab32..cc2afc21a30d 100644 +AD4 --- a/drivers/scsi/qla2xxx/qla+AF8-nvme.c +AD4 +-+-+- b/drivers/scsi/qla2xxx/qla+AF8-nvme.c +AD4 +AEAAQA -573,7 +-573,7 +AEAAQA static struct nvme+AF8-fc+AF8-port+AF8-template qla+AF8-nvme+AF8-fc+AF8-transport +AD0 +AHs +AD4 .fcp+AF8-io +AD0 qla+AF8-nvme+AF8-post+AF8-cmd, +AD4 .fcp+AF8-abort +AD0 qla+AF8-nvme+AF8-fcp+AF8-abort, +AD4 .max+AF8-hw+AF8-queues +AD0 8, +AD4 - .max+AF8-sgl+AF8-segments +AD0 128, +AD4 +- .max+AF8-sgl+AF8-segments +AD0 1024, +AD4 .max+AF8-dif+AF8-sgl+AF8-segments +AD0 64, +AD4 .dma+AF8-boundary +AD0 0xFFFFFFFF, +AD4 .local+AF8-priv+AF8-sz +AD0 8, Where does the original value +ACI-128+ACI come from? Where does the new value +ACI-1024+ACI come from? Do all firmware versions support the new and larger value? Thanks, Bart.