Quoting Avri Altman (2019-02-06 05:57:17) > Hi, > > > On 06/02/19 12:29 AM, Evan Green wrote: > > > Expose a reset controller that the phy will later use to control its > > > own PHY reset in the UFS controller. This will enable the combining > > > of PHY init functionality into a single function. > > > > > > Signed-off-by: Evan Green <evgreen@xxxxxxxxxxxx> > > > > I'd like to get ACK from scsi/ufs/ MAINTAINER Vinayak for me merge it in PHY > > tree. > Looks like this series is qcom specific, and has less impact of the ufs core driver. > > > > + err = devm_reset_controller_register(dev, &host->rcdev); > Just my 2 cents: > Isn't this should be done somewhere in drivers/clk/qcom, > Like its done for any other qcom board? It's not a clk controller, so I don't see how that makes sense. There are clk/reset controllers on qcom platforms, and so we've combined them into the same overall driver there because those resets affect clk operations and vice-versa. But this looks like some sort of reset in the phy or the controller itself and isn't the "clk type" resets that we implement in drivers/clk/qcom/
