Hi Marc, I'm not sure, but please check below comment. On 12/13/18, Marc Gonzalez <marc.w.gonzalez@xxxxxxx> wrote: > Hello everyone, > > I'm having trouble getting UFS working on an APQ8098 MEDIABOX dev board. > (I'm running v4.20-rc4 with a few UFS patches taken off the MSM list.) > > I'm hoping someone with experience with the UFSHC will spot the one thing > missing that will make everything work! > > Below is the full boot log, with tracing and debugging enabled: > > # dmesg > [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x51af8014] > [ 0.000000] Linux version 4.20.0-rc4 (mgonzalez@venus) (gcc version 7.3.1 > 20180425 [linaro-7.3-2018.05 revision > d29120a424ecfbc167ef90065c0eeb7f91977701] (Linaro GCC 7.3-2018.05)) #13 SMP > PREEMPT Thu Dec 13 14:33:24 CET 2018 > [ 0.000000] Machine model: Qualcomm Technologies, Inc. MSM8998 v1 MTP > [ 0.000000] printk: debug: ignoring loglevel setting. > [ 0.000000] efi: Getting EFI parameters from FDT: > [ 0.000000] efi: UEFI not found. > [ 0.000000] cma: Reserved 32 MiB at 0x00000000fe000000 > [ 0.000000] NUMA: No NUMA configuration found > [ 0.000000] NUMA: Faking a node at [mem > 0x0000000080000000-0x000000017e3bffff] > [ 0.000000] NUMA: NODE_DATA [mem 0x17e394840-0x17e395fff] > [ 0.000000] Zone ranges: > [ 0.000000] DMA32 [mem 0x0000000080000000-0x00000000ffffffff] > [ 0.000000] Normal [mem 0x0000000100000000-0x000000017e3bffff] > [ 0.000000] Movable zone start for each node > [ 0.000000] Early memory node ranges > [ 0.000000] node 0: [mem 0x0000000080000000-0x00000000857fffff] > [ 0.000000] node 0: [mem 0x0000000088800000-0x00000000a1dfffff] > [ 0.000000] node 0: [mem 0x00000000a2000000-0x000000017e3bffff] > [ 0.000000] Initmem setup node 0 [mem > 0x0000000080000000-0x000000017e3bffff] > [ 0.000000] On node 0 totalpages: 1028544 > [ 0.000000] DMA32 zone: 8192 pages used for memmap > [ 0.000000] DMA32 zone: 0 pages reserved > [ 0.000000] DMA32 zone: 511488 pages, LIFO batch:63 > [ 0.000000] Normal zone: 8079 pages used for memmap > [ 0.000000] Normal zone: 517056 pages, LIFO batch:63 > [ 0.000000] psci: probing for conduit method from DT. > [ 0.000000] psci: PSCIv1.0 detected in firmware. > [ 0.000000] psci: Using standard PSCI v0.2 function IDs > [ 0.000000] psci: MIGRATE_INFO_TYPE not supported. > [ 0.000000] psci: SMC Calling Convention v1.0 > [ 0.000000] random: get_random_bytes called from start_kernel+0xac/0x46c > with crng_init=0 > [ 0.000000] percpu: Embedded 23 pages/cpu @(____ptrval____) s55000 r8192 > d31016 u94208 > [ 0.000000] pcpu-alloc: s55000 r8192 d31016 u94208 alloc=23*4096 > [ 0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 [0] 4 [0] 5 [0] 6 [0] 7 > [ 0.000000] Detected VIPT I-cache on CPU0 > [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI) > [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: > 1012273 > [ 0.000000] Policy zone: Normal > [ 0.000000] Kernel command line: console=ttyMSM0,115200,n8 > ignore_loglevel trace_event=ufs:*,scsi:*,clk:*,regulator:*,rpmh:* tp_printk > androidboot.bootdevice=1da4000.ufshc androidboot.serialno=53733c35 > androidboot.baseband=apq m > dss_mdp.panel=1:hdmi:16 > [ 0.000000] software IO TLB: mapped [mem 0xf9fff000-0xfdfff000] (64MB) > [ 0.000000] Memory: 3927928K/4114176K available (6716K kernel code, 920K > rwdata, 2796K rodata, 9792K init, 306K bss, 153480K reserved, 32768K > cma-reserved) > [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1 > [ 0.000000] rcu: Preemptible hierarchical RCU implementation. > [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=64 to > nr_cpu_ids=8. > [ 0.000000] Tasks RCU enabled. > [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 > jiffies. > [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8 > [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0 > [ 0.000000] GICv3: Distributor has no Range Selector support > [ 0.000000] GICv3: no VLPI support, no direct LPI support > [ 0.000000] GICv3: CPU0: found redistributor 0 region > 0:0x0000000017b00000 > [ 0.000000] ITS: No ITS available, not enabling LPIs > [ 0.000000] arch_timer: cp15 and mmio timer(s) running at 19.20MHz > (virt/virt). > [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff > max_cycles: 0x46d987e47, max_idle_ns: 440795202767 ns > [ 0.000002] sched_clock: 56 bits at 19MHz, resolution 52ns, wraps every > 4398046511078ns > [ 0.000094] Console: colour dummy device 80x25 > [ 0.000141] Calibrating delay loop (skipped), value calculated using > timer frequency.. 38.40 BogoMIPS (lpj=76800) > [ 0.000149] pid_max: default: 32768 minimum: 301 > [ 0.000210] LSM: Security Framework initializing > [ 0.001194] Dentry cache hash table entries: 524288 (order: 10, 4194304 > bytes) > [ 0.001684] Inode-cache hash table entries: 262144 (order: 9, 2097152 > bytes) > [ 0.001716] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes) > [ 0.001744] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 > bytes) > [ 0.023899] ASID allocator initialised with 32768 entries > [ 0.031897] rcu: Hierarchical SRCU implementation. > [ 0.040613] EFI services will not be available. > [ 0.047922] smp: Bringing up secondary CPUs ... > [ 0.082316] Detected VIPT I-cache on CPU1 > [ 0.082345] GICv3: CPU1: found redistributor 1 region > 0:0x0000000017b20000 > [ 0.082393] CPU1: Booted secondary processor 0x0000000001 [0x51af8014] > [ 0.114412] Detected VIPT I-cache on CPU2 > [ 0.114434] GICv3: CPU2: found redistributor 2 region > 0:0x0000000017b40000 > [ 0.114476] CPU2: Booted secondary processor 0x0000000002 [0x51af8014] > [ 0.146698] Detected VIPT I-cache on CPU3 > [ 0.146723] GICv3: CPU3: found redistributor 3 region > 0:0x0000000017b60000 > [ 0.146763] CPU3: Booted secondary processor 0x0000000003 [0x51af8014] > [ 0.179295] Detected VIPT I-cache on CPU4 > [ 0.179322] CPU features: SANITY CHECK: Unexpected variation in > SYS_ID_AA64MMFR0_EL1. Boot CPU: 0x00000000001122, CPU4: 0x00000000101122 > [ 0.179344] CPU features: Unsupported CPU feature variation detected. > [ 0.179376] GICv3: CPU4: found redistributor 100 region > 0:0x0000000017b80000 > [ 0.179448] CPU4: Booted secondary processor 0x0000000100 [0x51af8001] > [ 0.211399] Detected VIPT I-cache on CPU5 > [ 0.211423] CPU features: SANITY CHECK: Unexpected variation in > SYS_ID_AA64MMFR0_EL1. Boot CPU: 0x00000000001122, CPU5: 0x00000000101122 > [ 0.211474] GICv3: CPU5: found redistributor 101 region > 0:0x0000000017ba0000 > [ 0.211542] CPU5: Booted secondary processor 0x0000000101 [0x51af8001] > [ 0.243716] Detected VIPT I-cache on CPU6 > [ 0.243740] CPU features: SANITY CHECK: Unexpected variation in > SYS_ID_AA64MMFR0_EL1. Boot CPU: 0x00000000001122, CPU6: 0x00000000101122 > [ 0.243793] GICv3: CPU6: found redistributor 102 region > 0:0x0000000017bc0000 > [ 0.243863] CPU6: Booted secondary processor 0x0000000102 [0x51af8001] > [ 0.276050] Detected VIPT I-cache on CPU7 > [ 0.276073] CPU features: SANITY CHECK: Unexpected variation in > SYS_ID_AA64MMFR0_EL1. Boot CPU: 0x00000000001122, CPU7: 0x00000000101122 > [ 0.276129] GICv3: CPU7: found redistributor 103 region > 0:0x0000000017be0000 > [ 0.276199] CPU7: Booted secondary processor 0x0000000103 [0x51af8001] > [ 0.276362] smp: Brought up 1 node, 8 CPUs > [ 0.276409] SMP: Total of 8 processors activated. > [ 0.276414] CPU features: detected: GIC system register CPU interface > [ 0.276419] CPU features: detected: 32-bit EL0 Support > [ 0.276423] CPU features: detected: CRC32 instructions > [ 0.282004] CPU: All CPU(s) started at EL1 > [ 0.282044] alternatives: patching kernel code > [ 0.283056] devtmpfs: initialized > [ 0.285732] clocksource: jiffies: mask: 0xffffffff max_cycles: > 0xffffffff, max_idle_ns: 7645041785100000 ns > [ 0.285762] futex hash table entries: 2048 (order: 5, 131072 bytes) > [ 0.286584] pinctrl core: initialized pinctrl subsystem > [ 0.286902] regulator_enable: name=regulator-dummy > [ 0.287169] DMI not present or invalid. > [ 0.288026] vdso: 2 pages (1 code @ (____ptrval____), 1 data @ > (____ptrval____)) > [ 0.288035] hw-breakpoint: found 6 breakpoint and 4 watchpoint > registers. > [ 0.289028] DMA: preallocated 256 KiB pool for atomic allocations > [ 0.289252] Serial: AMBA PL011 UART driver > [ 0.291453] clk_prepare: gcc_hmss_dvm_bus_clk > [ 0.291461] clk_prepare_complete: gcc_hmss_dvm_bus_clk > [ 0.291469] clk_enable: gcc_hmss_dvm_bus_clk > [ 0.291479] clk_enable_complete: gcc_hmss_dvm_bus_clk > [ 0.291566] clk_prepare: gcc_lpass_at_clk > [ 0.291571] clk_prepare_complete: gcc_lpass_at_clk > [ 0.291576] clk_enable: gcc_lpass_at_clk > [ 0.291585] clk_enable_complete: gcc_lpass_at_clk > [ 0.302075] HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages > [ 0.302444] cryptd: max_cpu_qlen set to 1000 > [ 0.303132] regulator_enable: name=vph_pwr > [ 0.303552] vgaarb: loaded > [ 0.303748] SCSI subsystem initialized > [ 0.303865] pps_core: LinuxPPS API ver. 1 registered > [ 0.303869] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo > Giometti <giometti@xxxxxxxx> > [ 0.303963] EDAC MC: Ver: 3.0.0 > [ 0.304892] clocksource: Switched to clocksource arch_sys_counter > [ 0.322549] s1: supplied by vph_pwr > [ 0.322979] s2: supplied by vph_pwr > [ 0.323312] s3: supplied by vph_pwr > [ 0.323355] s3: Bringing 0uV into 1352000-1352000uV > [ 0.323438] regulator_set_voltage: name=s3 (1352000-1352000) > [ 0.323649] regulator_set_voltage_complete: name=s3, val=320000 > [ 0.323849] s4: supplied by vph_pwr > [ 0.323901] s4: Bringing 0uV into 1800000-1800000uV > [ 0.323910] regulator_set_voltage: name=s4 (1800000-1800000) > [ 0.324037] regulator_set_voltage_complete: name=s4, val=320000 > [ 0.324212] s5: supplied by vph_pwr > [ 0.324351] s5: Bringing 0uV into 1904000-1904000uV > [ 0.324358] regulator_set_voltage: name=s5 (1904000-1904000) > [ 0.324501] regulator_set_voltage_complete: name=s5, val=320000 > [ 0.324668] s6: supplied by vph_pwr > [ 0.324870] s7: supplied by vph_pwr > [ 0.324953] s7: Bringing 0uV into 900000-900000uV > [ 0.324962] regulator_set_voltage: name=s7 (900000-900000) > [ 0.325043] regulator_set_voltage_complete: name=s7, val=320000 > [ 0.325186] s8: supplied by vph_pwr > [ 0.325480] s9: supplied by vph_pwr > [ 0.325676] s10: supplied by vph_pwr > [ 0.325851] s11: supplied by vph_pwr > [ 0.326155] s12: supplied by vph_pwr > [ 0.326421] s13: supplied by vph_pwr > [ 0.326623] l1: supplied by s7 > [ 0.326661] l1: Bringing 0uV into 880000-880000uV > [ 0.326670] regulator_set_voltage: name=l1 (880000-880000) > [ 0.326746] regulator_set_voltage_complete: name=l1, val=312000 > [ 0.326990] l2: supplied by s3 > [ 0.327030] l2: Bringing 0uV into 1200000-1200000uV > [ 0.327037] regulator_set_voltage: name=l2 (1200000-1200000) > [ 0.327114] regulator_set_voltage_complete: name=l2, val=312000 > [ 0.327270] l3: supplied by s7 > [ 0.327317] l3: Bringing 0uV into 1000000-1000000uV > [ 0.327324] regulator_set_voltage: name=l3 (1000000-1000000) > [ 0.327422] regulator_set_voltage_complete: name=l3, val=312000 > [ 0.327588] l4: supplied by s7 > [ 0.327849] l5: supplied by s7 > [ 0.327899] l5: Bringing 0uV into 800000-800000uV > [ 0.327906] regulator_set_voltage: name=l5 (800000-800000) > [ 0.328022] regulator_set_voltage_complete: name=l5, val=312000 > [ 0.328184] l6: supplied by s5 > [ 0.328226] l6: Bringing 0uV into 1808000-1808000uV > [ 0.328232] regulator_set_voltage: name=l6 (1808000-1808000) > [ 0.328330] regulator_set_voltage_complete: name=l6, val=1664000 > [ 0.328499] l7: supplied by s5 > [ 0.328540] l7: Bringing 0uV into 1800000-1800000uV > [ 0.328548] regulator_set_voltage: name=l7 (1800000-1800000) > [ 0.328653] regulator_set_voltage_complete: name=l7, val=1256000 > [ 0.329585] l8: supplied by s3 > [ 0.329626] l8: Bringing 0uV into 1200000-1200000uV > [ 0.329632] regulator_set_voltage: name=l8 (1200000-1200000) > [ 0.329732] regulator_set_voltage_complete: name=l8, val=312000 > [ 0.329888] l9: Bringing 0uV into 1808000-1808000uV > [ 0.329895] regulator_set_voltage: name=l9 (1808000-1808000) > [ 0.329998] regulator_set_voltage_complete: name=l9, val=1664000 > [ 0.330201] l10: Bringing 0uV into 1808000-1808000uV > [ 0.330208] regulator_set_voltage: name=l10 (1808000-1808000) > [ 0.330307] regulator_set_voltage_complete: name=l10, val=1664000 > [ 0.330495] l11: supplied by s7 > [ 0.330550] l11: Bringing 0uV into 1000000-1000000uV > [ 0.330560] regulator_set_voltage: name=l11 (1000000-1000000) > [ 0.330675] regulator_set_voltage_complete: name=l11, val=312000 > [ 0.330862] l12: supplied by s5 > [ 0.331006] l12: Bringing 0uV into 1800000-1800000uV > [ 0.331015] regulator_set_voltage: name=l12 (1800000-1800000) > [ 0.331091] regulator_set_voltage_complete: name=l12, val=1256000 > [ 0.331256] l13: Bringing 0uV into 1808000-1808000uV > [ 0.331263] regulator_set_voltage: name=l13 (1808000-1808000) > [ 0.331384] regulator_set_voltage_complete: name=l13, val=1664000 > [ 0.331564] l14: supplied by s5 > [ 0.331612] l14: Bringing 0uV into 1880000-1880000uV > [ 0.331619] regulator_set_voltage: name=l14 (1880000-1880000) > [ 0.331716] regulator_set_voltage_complete: name=l14, val=1256000 > [ 0.331907] l15: supplied by s5 > [ 0.331950] l15: Bringing 0uV into 1800000-1800000uV > [ 0.331957] regulator_set_voltage: name=l15 (1800000-1800000) > [ 0.332056] regulator_set_voltage_complete: name=l15, val=1256000 > [ 0.332337] l16: Bringing 0uV into 2704000-2704000uV > [ 0.332346] regulator_set_voltage: name=l16 (2704000-2704000) > [ 0.332452] regulator_set_voltage_complete: name=l16, val=1664000 > [ 0.332673] l17: supplied by s3 > [ 0.332727] l17: Bringing 0uV into 1304000-1304000uV > [ 0.332735] regulator_set_voltage: name=l17 (1304000-1304000) > [ 0.332862] regulator_set_voltage_complete: name=l17, val=312000 > [ 0.333115] l18: Bringing 0uV into 2704000-2704000uV > [ 0.333123] regulator_set_voltage: name=l18 (2704000-2704000) > [ 0.333224] regulator_set_voltage_complete: name=l18, val=1664000 > [ 0.333276] VFS: Disk quotas dquot_6.6.0 > [ 0.333443] l19: Bringing 0uV into 3008000-3008000uV > [ 0.333451] regulator_set_voltage: name=l19 (3008000-3008000) > [ 0.333459] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 > bytes) > [ 0.333563] regulator_set_voltage_complete: name=l19, val=1664000 > [ 0.333788] l20: Bringing 0uV into 2960000-2960000uV > [ 0.333795] regulator_set_voltage: name=l20 (2960000-2960000) > [ 0.333913] regulator_set_voltage_complete: name=l20, val=1664000 > [ 0.334186] l21: Bringing 0uV into 2960000-2960000uV > [ 0.334197] regulator_set_voltage: name=l21 (2960000-2960000) > [ 0.334314] regulator_set_voltage_complete: name=l21, val=1664000 > [ 0.334703] l22: Bringing 0uV into 2864000-2864000uV > [ 0.334712] regulator_set_voltage: name=l22 (2864000-2864000) > [ 0.334813] regulator_set_voltage_complete: name=l22, val=1664000 > [ 0.335180] l23: Bringing 0uV into 3312000-3312000uV > [ 0.335189] regulator_set_voltage: name=l23 (3312000-3312000) > [ 0.335293] regulator_set_voltage_complete: name=l23, val=1664000 > [ 0.335569] l24: Bringing 0uV into 3088000-3088000uV > [ 0.335578] regulator_set_voltage: name=l24 (3088000-3088000) > [ 0.335714] regulator_set_voltage_complete: name=l24, val=1664000 > [ 0.336026] l25: Bringing 0uV into 3104000-3104000uV > [ 0.336034] regulator_set_voltage: name=l25 (3104000-3104000) > [ 0.336148] regulator_set_voltage_complete: name=l25, val=1664000 > [ 0.336449] l26: supplied by s3 > [ 0.336503] l26: Bringing 0uV into 1200000-1200000uV > [ 0.336509] regulator_set_voltage: name=l26 (1200000-1200000) > [ 0.336625] regulator_set_voltage_complete: name=l26, val=312000 > [ 0.336951] l27: supplied by s7 > [ 0.337393] l28: Bringing 0uV into 3008000-3008000uV > [ 0.337403] regulator_set_voltage: name=l28 (3008000-3008000) > [ 0.337506] regulator_set_voltage_complete: name=l28, val=1664000 > [ 0.337870] lvs1: supplied by s4 > [ 0.338251] lvs2: supplied by s4 > [ 0.339659] bob: supplied by vph_pwr > [ 0.339717] bob: Bringing 0uV into 3312000-3312000uV > [ 0.339730] regulator_set_voltage: name=bob (3312000-3312000) > [ 0.339816] regulator_set_voltage_complete: name=bob, val=3312000 > [ 0.346821] PCI: CLS 0 bytes, default 64 > [ 0.938203] Initialise system trusted keyrings > [ 0.938637] workingset: timestamp_bits=44 max_order=20 bucket_order=0 > [ 1.020694] Key type asymmetric registered > [ 1.020762] Asymmetric key parser 'x509' registered > [ 1.021091] Block layer SCSI generic (bsg) driver version 0.4 loaded > (major 248) > [ 1.021115] io scheduler noop registered > [ 1.021121] io scheduler deadline registered > [ 1.021706] io scheduler cfq registered (default) > [ 1.021721] io scheduler mq-deadline registered > [ 1.021730] io scheduler kyber registered > [ 1.024531] qcom-qmp-phy 1da7000.phy: Linked as a consumer to > regulator.15 > [ 1.024661] qcom-qmp-phy 1da7000.phy: Linked as a consumer to > regulator.16 > [ 1.025395] qcom-qmp-phy 1da7000.phy: Registered Qcom-QMP phy > [ 1.036625] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled > [ 1.039281] msm_serial c1b0000.serial: msm_serial: detected port #0 > [ 1.039376] msm_serial c1b0000.serial: uartclk = 1843200 > [ 1.039532] c1b0000.serial: ttyMSM0 at MMIO 0xc1b0000 (irq = 13, > base_baud = 115200) is a MSM > [ 1.039633] clk_prepare: xo_board > [ 1.039667] clk_prepare_complete: xo_board > [ 1.039677] clk_prepare: xo > [ 1.039685] clk_prepare_complete: xo > [ 1.039692] clk_prepare: blsp2_uart2_apps_clk_src > [ 1.039702] clk_prepare_complete: blsp2_uart2_apps_clk_src > [ 1.039710] clk_prepare: gcc_blsp2_uart2_apps_clk > [ 1.039720] clk_prepare_complete: gcc_blsp2_uart2_apps_clk > [ 1.039752] clk_enable: xo_board > [ 1.039766] clk_enable_complete: xo_board > [ 1.039774] clk_enable: xo > [ 1.039780] clk_enable_complete: xo > [ 1.039786] clk_enable: blsp2_uart2_apps_clk_src > [ 1.039794] clk_enable_complete: blsp2_uart2_apps_clk_src > [ 1.039802] clk_enable: gcc_blsp2_uart2_apps_clk > [ 1.039849] clk_enable_complete: gcc_blsp2_uart2_apps_clk > [ 1.039861] clk_prepare: gcc_blsp2_ahb_clk > [ 1.039869] clk_prepare_complete: gcc_blsp2_ahb_clk > [ 1.039877] clk_enable: gcc_blsp2_ahb_clk > [ 1.039894] clk_enable_complete: gcc_blsp2_ahb_clk > [ 1.039940] msm_serial: console setup on port #0 > [ 2.620175] printk: console [ttyMSM0] enabled > [ 2.625302] msm_serial: driver initialized > [ 2.649159] loop: module loaded > [ 2.652192] ufshcd-qcom 1da4000.ufshc: freq-table-hz: min 50000000 max > 200000000 name core_clk > [ 2.652277] ufshcd-qcom 1da4000.ufshc: freq-table-hz: min 0 max 0 name > bus_aggr_clk > [ 2.659895] ufshcd-qcom 1da4000.ufshc: freq-table-hz: min 0 max 0 name > iface_clk > [ 2.667438] ufshcd-qcom 1da4000.ufshc: freq-table-hz: min 37500000 max > 150000000 name core_clk_unipro > [ 2.675104] ufshcd-qcom 1da4000.ufshc: freq-table-hz: min 75000000 max > 300000000 name core_clk_ice > [ 2.684204] ufshcd-qcom 1da4000.ufshc: freq-table-hz: min 0 max 0 name > ref_clk > [ 2.693052] ufshcd-qcom 1da4000.ufshc: freq-table-hz: min 0 max 0 name > tx_lane0_sync_clk > [ 2.700254] ufshcd-qcom 1da4000.ufshc: freq-table-hz: min 0 max 0 name > rx_lane0_sync_clk > [ 2.708499] ufshcd-qcom 1da4000.ufshc: freq-table-hz: min 0 max 0 name > rx_lane1_sync_clk > [ 2.716586] ufshcd-qcom 1da4000.ufshc: ufshcd_populate_vreg: Unable to > find vdd-hba-supply regulator, assuming enabled > [ 2.724900] ufshcd-qcom 1da4000.ufshc: ufshcd_init_clocks: clk: core_clk, > rate: 198400000 > [ 2.735160] ufshcd-qcom 1da4000.ufshc: ufshcd_init_clocks: clk: > bus_aggr_clk, rate: 198400000 > [ 2.743413] ufshcd-qcom 1da4000.ufshc: ufshcd_init_clocks: clk: > iface_clk, rate: 0 > [ 2.751917] ufshcd-qcom 1da4000.ufshc: ufshcd_init_clocks: clk: > core_clk_unipro, rate: 148800000 > [ 2.759385] ufshcd-qcom 1da4000.ufshc: ufshcd_init_clocks: clk: > core_clk_ice, rate: 0 > [ 2.768329] ufshcd-qcom 1da4000.ufshc: ufshcd_init_clocks: clk: ref_clk, > rate: 19200000 > [ 2.776040] ufshcd-qcom 1da4000.ufshc: ufshcd_init_clocks: clk: > tx_lane0_sync_clk, rate: 0 > [ 2.783861] ufshcd-qcom 1da4000.ufshc: ufshcd_init_clocks: clk: > rx_lane0_sync_clk, rate: 0 > [ 2.792189] ufshcd-qcom 1da4000.ufshc: ufshcd_init_clocks: clk: > rx_lane1_sync_clk, rate: 0 > [ 2.800525] clk_prepare: gpll0 > [ 2.808669] clk_prepare_complete: gpll0 > [ 2.811686] clk_prepare: gpll0_out_main > [ 2.815416] clk_prepare_complete: gpll0_out_main > [ 2.819311] clk_prepare: ufs_axi_clk_src > [ 2.824102] clk_prepare_complete: ufs_axi_clk_src > [ 2.828017] clk_prepare: gcc_ufs_axi_clk > [ 2.832601] clk_prepare_complete: gcc_ufs_axi_clk > [ 2.836630] clk_enable: gpll0 > [ 2.841240] clk_enable_complete: gpll0 > [ 2.844137] clk_enable: gpll0_out_main > [ 2.847787] clk_enable_complete: gpll0_out_main > [ 2.851519] clk_enable: ufs_axi_clk_src > [ 2.855946] clk_enable_complete: ufs_axi_clk_src > [ 2.859769] clk_enable: gcc_ufs_axi_clk > [ 2.864638] clk_enable_complete: gcc_ufs_axi_clk > [ 2.868213] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: > core_clk enabled > [ 2.873087] clk_prepare: gcc_aggre1_ufs_axi_clk > [ 2.880435] clk_prepare_complete: gcc_aggre1_ufs_axi_clk > [ 2.884956] clk_enable: gcc_aggre1_ufs_axi_clk > [ 2.890506] clk_enable_complete: gcc_aggre1_ufs_axi_clk > [ 2.894762] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: > bus_aggr_clk enabled > [ 2.899913] clk_prepare: gcc_ufs_ahb_clk > [ 2.907866] clk_prepare_complete: gcc_ufs_ahb_clk > [ 2.912032] clk_enable: gcc_ufs_ahb_clk > [ 2.916624] clk_enable_complete: gcc_ufs_ahb_clk > [ 2.920279] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: > iface_clk enabled > [ 2.925165] clk_prepare: ufs_unipro_core_clk_src > [ 2.932881] clk_prepare_complete: ufs_unipro_core_clk_src > [ 2.937481] clk_prepare: gcc_ufs_unipro_core_clk > [ 2.942763] clk_prepare_complete: gcc_ufs_unipro_core_clk > [ 2.947462] clk_enable: ufs_unipro_core_clk_src > [ 2.952739] clk_enable_complete: ufs_unipro_core_clk_src > [ 2.957084] clk_enable: gcc_ufs_unipro_core_clk > [ 2.962636] clk_enable_complete: gcc_ufs_unipro_core_clk > [ 2.966899] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: > core_clk_unipro enabled > [ 2.972482] clk_prepare: gcc_ufs_ice_core_clk > [ 2.980526] clk_prepare_complete: gcc_ufs_ice_core_clk > [ 2.984958] clk_enable: gcc_ufs_ice_core_clk > [ 2.989980] clk_enable_complete: gcc_ufs_ice_core_clk > [ 2.994420] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: > core_clk_ice enabled > [ 2.999386] clk_prepare: bb_clk1 > [ 3.007465] clk_prepare_complete: bb_clk1 > [ 3.010650] clk_enable: bb_clk1 > [ 3.014535] clk_enable_complete: bb_clk1 > [ 3.017498] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: > ref_clk enabled > [ 3.021693] clk_prepare: gcc_ufs_tx_symbol_0_clk > [ 3.029047] clk_prepare_complete: gcc_ufs_tx_symbol_0_clk > [ 3.033827] clk_enable: gcc_ufs_tx_symbol_0_clk > [ 3.039113] clk_enable_complete: gcc_ufs_tx_symbol_0_clk > [ 3.043462] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: > tx_lane0_sync_clk enabled > [ 3.049043] clk_prepare: gcc_ufs_rx_symbol_0_clk > [ 3.057432] clk_prepare_complete: gcc_ufs_rx_symbol_0_clk > [ 3.062039] clk_enable: gcc_ufs_rx_symbol_0_clk > [ 3.067323] clk_enable_complete: gcc_ufs_rx_symbol_0_clk > [ 3.071674] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: > rx_lane0_sync_clk enabled > [ 3.077257] clk_prepare: gcc_ufs_rx_symbol_1_clk > [ 3.085646] clk_prepare_complete: gcc_ufs_rx_symbol_1_clk > [ 3.090249] clk_enable: gcc_ufs_rx_symbol_1_clk > [ 3.095537] clk_enable_complete: gcc_ufs_rx_symbol_1_clk > [ 3.099885] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: > rx_lane1_sync_clk enabled > [ 3.105496] ufshcd_clk_gating: 1da4000.ufshc: gating state changed to > CLKS_ON > [ 3.113901] ufshcd_profile_clk_gating: 1da4000.ufshc: on: took 313449 > usecs, err 0 > [ 3.121109] l20: supplied by bob > [ 3.128656] ufshcd-qcom 1da4000.ufshc: Linked as a consumer to > regulator.34 > [ 3.131847] ufshcd-qcom 1da4000.ufshc: Linked as a consumer to > regulator.40 > [ 3.138518] ufshcd-qcom 1da4000.ufshc: Linked as a consumer to > regulator.5 > [ 3.145460] regulator_enable: name=bob > [ 3.152397] regulator_enable_delay: name=bob > [ 3.156056] regulator_enable_complete: name=bob > [ 3.160472] regulator_enable: name=l20 > [ 3.165153] regulator_enable_delay: name=l20 > [ 3.168537] regulator_enable_complete: name=l20 > [ 3.172994] regulator_enable: name=s3 > [ 3.177284] regulator_enable_delay: name=s3 > [ 3.181039] regulator_enable_complete: name=s3 > [ 3.185036] regulator_enable: name=l26 > [ 3.189798] regulator_enable_delay: name=l26 > [ 3.193284] regulator_enable_complete: name=l26 > [ 3.197715] regulator_enable: name=s4 > [ 3.202020] regulator_enable_delay: name=s4 > [ 3.205781] regulator_enable_complete: name=s4 > [ 3.212521] scsi host0: ufshcd > [ 3.216433] regulator_enable: name=s7 > [ 3.217337] regulator_enable: name=l2 > [ 3.221057] regulator_enable_delay: name=s7 > [ 3.224702] regulator_enable_delay: name=l2 > [ 3.228697] regulator_enable_complete: name=s7 > [ 3.232865] regulator_enable_complete: name=l2 > [ 3.237379] regulator_enable: name=l1 > [ 3.241874] regulator_enable_delay: name=l1 > [ 3.245538] regulator_enable_complete: name=l1 > [ 3.249567] clk_prepare: gcc_ufs_clkref_clk > [ 3.254050] clk_prepare_complete: gcc_ufs_clkref_clk > [ 3.258135] clk_prepare: gcc_ufs_phy_aux_clk > [ 3.263332] clk_prepare_complete: gcc_ufs_phy_aux_clk > [ 3.267595] clk_enable: gcc_ufs_clkref_clk > [ 3.272536] clk_enable_complete: gcc_ufs_clkref_clk > [ 3.276532] clk_enable: gcc_ufs_phy_aux_clk > [ 3.281296] clk_enable_complete: gcc_ufs_phy_aux_clk > [ 3.299037] spmi spmi-0: PMIC arbiter version v3 (0x30000000) > [ 3.311718] ufshcd-qcom 1da4000.ufshc: ufshcd_print_pwr_info:[RX, TX]: > gear=[1, 1], lane[1, 1], pwr[SLOWAUTO_MODE, SLOWAUTO_MODE], rate = 0 > [ 3.311996] ufshcd_upiu: query_send: 1da4000.ufshc: HDR:00 00 00 1f 00 00 > 00 00 00 00 00 00, CDB:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > [ 3.312401] VFIO - User Level meta-driver version: 0.3 > [ 3.323210] ufshcd_command: send: 1da4000.ufshc: tag: 31, DB: 0x80000000, > size: -1, IS: 0, LBA: 18446744073709551615, opcode: 0x0 > [ 3.337240] i2c /dev entries driver > [ 3.341300] ufshcd_command: dev_complete: 1da4000.ufshc: tag: 31, DB: > 0x0, size: -1, IS: 0, LBA: 18446744073709551615, opcode: 0x0 > [ 3.355049] input: pm8941_pwrkey as > /devices/platform/soc/800f000.spmi/spmi-0/0-00/800f000.spmi:pmic@0:pon@800/800f000.spmi:pmic@0:pon@800:pwrkey/input/input0 > [ 3.356335] ufshcd_upiu: query_complete: 1da4000.ufshc: HDR:00 00 00 1f > 00 00 00 00 00 00 00 00, CDB:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 > [ 3.374250] Loading compiled-in X.509 certificates > [ 3.382327] ufshcd_upiu: query_send: 1da4000.ufshc: HDR:16 00 00 1f 00 81 > 00 00 00 00 00 00, CDB:06 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > [ 3.400346] ufshcd_command: send: 1da4000.ufshc: tag: 31, DB: 0x80000000, > size: -1, IS: 0, LBA: 18446744073709551615, opcode: 0x0 > [ 3.423133] clk_disable: gcc_usb_phy_cfg_ahb2phy_clk > [ 3.424932] clk_disable_complete: gcc_usb_phy_cfg_ahb2phy_clk > [ 3.429975] clk_disable: gcc_usb3_phy_pipe_clk > [ 3.435578] clk_disable_complete: gcc_usb3_phy_pipe_clk > [ 3.439936] clk_disable: gcc_usb30_sleep_clk > [ 3.445038] clk_disable_complete: gcc_usb30_sleep_clk > [ 3.449629] clk_disable: gcc_mss_at_clk > [ 3.454496] clk_disable_complete: gcc_mss_at_clk > [ 3.458160] clk_disable: gcc_mmss_sys_noc_axi_clk > [ 3.463009] clk_disable_complete: gcc_mmss_sys_noc_axi_clk > [ 3.467626] clk_disable: gcc_mmss_qm_core_clk > [ 3.472990] clk_disable_complete: gcc_mmss_qm_core_clk > [ 3.477432] clk_disable: gcc_mmss_qm_ahb_clk > [ 3.482468] clk_disable_complete: gcc_mmss_qm_ahb_clk > [ 3.486894] clk_disable: gcc_mmss_noc_cfg_ahb_clk > [ 3.491831] clk_disable_complete: gcc_mmss_noc_cfg_ahb_clk > [ 3.496547] clk_disable: gcc_hmss_at_clk > [ 3.501895] clk_disable_complete: gcc_hmss_at_clk > [ 3.505990] clk_disable: gcc_gpu_snoc_dvm_gfx_clk > [ 3.510584] clk_disable_complete: gcc_gpu_snoc_dvm_gfx_clk > [ 3.515281] clk_disable: gcc_gpu_cfg_ahb_clk > [ 3.520645] clk_disable_complete: gcc_gpu_cfg_ahb_clk > [ 3.525090] clk_disable: gcc_gpu_bimc_gfx_src_clk > [ 3.530025] clk_disable_complete: gcc_gpu_bimc_gfx_src_clk > [ 3.534737] clk_disable: gcc_gpu_bimc_gfx_clk > [ 3.540090] clk_disable_complete: gcc_gpu_bimc_gfx_clk > [ 3.544569] clk_disable: gcc_aggre1_noc_xo_clk > [ 3.549558] clk_disable_complete: gcc_aggre1_noc_xo_clk > [ 3.554053] clk_disable: gcc_rx1_usb2_clkref_clk > [ 3.559105] clk_disable_complete: gcc_rx1_usb2_clkref_clk > [ 3.563981] clk_disable: gcc_pcie_clkref_clk > [ 3.569255] clk_disable_complete: gcc_pcie_clkref_clk > [ 3.573614] clk_disable: gcc_hdmi_clkref_clk > [ 3.578545] clk_disable_complete: gcc_hdmi_clkref_clk > [ 3.582898] clk_disable: gcc_usb3_clkref_clk > [ 3.587838] clk_disable_complete: gcc_usb3_clkref_clk > [ 3.592188] clk_disable: gcc_usb3_phy_aux_clk > [ 3.597122] clk_disable_complete: gcc_usb3_phy_aux_clk > [ 3.601484] clk_disable: gcc_usb30_mock_utmi_clk > [ 3.606501] clk_disable_complete: gcc_usb30_mock_utmi_clk > [ 3.611346] clk_disable: gcc_hmss_rbcpr_clk > [ 3.616565] clk_disable_complete: gcc_hmss_rbcpr_clk > [ 3.620583] clk_disable: hmss_ahb_clk_src > [ 3.625762] clk_disable_complete: hmss_ahb_clk_src > [ 3.629734] clk_disable: gpll1 > [ 3.634352] clk_disable_complete: gpll1 > [ 3.637415] clk_disable: gcc_aggre1_usb3_axi_clk > [ 3.641136] clk_disable_complete: gcc_aggre1_usb3_axi_clk > [ 3.646017] clk_disable: gcc_cfg_noc_usb3_axi_clk > [ 3.651291] clk_disable_complete: gcc_cfg_noc_usb3_axi_clk > [ 3.656003] clk_disable: gcc_usb30_master_clk > [ 3.661358] clk_disable_complete: gcc_usb30_master_clk > [ 3.665800] clk_disable: usb30_master_clk_src > [ 3.670815] clk_disable_complete: usb30_master_clk_src > [ 3.675352] clk_disable: gcc_blsp2_qup5_i2c_apps_clk > [ 3.680288] clk_disable_complete: gcc_blsp2_qup5_i2c_apps_clk > [ 3.685882] l9: supplied by bob > [ 3.691161] l10: supplied by bob > [ 3.694060] l13: supplied by bob > [ 3.697531] l16: supplied by bob > [ 3.700831] l18: supplied by bob > [ 3.703955] l19: supplied by bob > [ 3.707162] l21: supplied by bob > [ 3.710378] l22: supplied by bob > [ 3.713589] l23: supplied by bob > [ 3.716798] l24: supplied by bob > [ 3.720095] l25: supplied by bob > [ 3.723241] l28: supplied by bob > [ 4.929036] ufshcd-qcom 1da4000.ufshc: ufshcd_wait_for_dev_cmd: dev_cmd > request timedout, tag 31 > [ 4.929229] ufshcd_upiu: query_complete_err: 1da4000.ufshc: HDR:16 00 00 > 1f 00 81 00 00 00 00 00 00, CDB:06 01 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 > [ 4.937060] ufshcd-qcom 1da4000.ufshc: ufshcd_query_flag: Sending flag > query for idn 1 failed, err = -11 > [ 4.950633] ufshcd-qcom 1da4000.ufshc: ufshcd_query_flag_retry: failed > with error -11, retries 0 > [ 4.960131] ufshcd_upiu: query_send: 1da4000.ufshc: HDR:16 00 00 1f 00 81 > 00 00 00 00 00 00, CDB:06 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > [ 4.968909] ufshcd_command: send: 1da4000.ufshc: tag: 31, DB: 0x80000000, > size: -1, IS: 0, LBA: 18446744073709551615, opcode: 0x0 > [ 5.034505] ufshcd-qcom 1da4000.ufshc: ufshcd_update_uic_error: UIC error > flags = 0x00000000 > [ 5.098107] ufshcd-qcom 1da4000.ufshc: ufshcd_update_uic_error: UIC error > flags = 0x00000000 > [ 5.168571] ufshcd-qcom 1da4000.ufshc: ufshcd_update_uic_error: UIC error > flags = 0x00000001 Here, your ufs has UIC layer error. Maybe it's affected (or not) fDeviceInit set query cmnd. Does this error reproduced every bootup?. How about another kernel versions like APQ808's reference kernel env?. If it's working fine, you'll be need to check about unipro/mphy configuration. > [ 6.496975] ufshcd-qcom 1da4000.ufshc: ufshcd_wait_for_dev_cmd: dev_cmd > request timedout, tag 31 > [ 6.497124] ufshcd_upiu: query_complete_err: 1da4000.ufshc: HDR:16 00 00 > 1f 00 81 00 00 00 00 00 00, CDB:06 01 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 > [ 6.504973] ufshcd-qcom 1da4000.ufshc: ufshcd_query_flag: Sending flag > query for idn 1 failed, err = -11 > [ 6.518557] ufshcd-qcom 1da4000.ufshc: ufshcd_query_flag_retry: failed > with error -11, retries 1 > [ 6.528048] ufshcd_upiu: query_send: 1da4000.ufshc: HDR:16 00 00 1f 00 81 > 00 00 00 00 00 00, CDB:06 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > [ 6.536824] ufshcd_command: send: 1da4000.ufshc: tag: 31, DB: 0x80000000, > size: -1, IS: 0, LBA: 18446744073709551615, opcode: 0x0 > [ 8.064945] ufshcd-qcom 1da4000.ufshc: ufshcd_wait_for_dev_cmd: dev_cmd > request timedout, tag 31 > [ 8.065086] ufshcd_upiu: query_complete_err: 1da4000.ufshc: HDR:16 00 00 > 1f 00 81 00 00 00 00 00 00, CDB:06 01 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 > [ 8.072934] ufshcd-qcom 1da4000.ufshc: ufshcd_query_flag: Sending flag > query for idn 1 failed, err = -11 > [ 8.086521] ufshcd-qcom 1da4000.ufshc: ufshcd_query_flag_retry: failed > with error -11, retries 2 > [ 8.095978] ufshcd-qcom 1da4000.ufshc: ufshcd_query_flag_retry: query > attribute, opcode 6, idn 1, failed with error -11 after 3 retires > [ 8.104773] ufshcd-qcom 1da4000.ufshc: ufshcd_complete_dev_init setting > fDeviceInit flag failed with error -11 > [ 8.116976] clk_disable: gcc_ufs_phy_aux_clk > [ 8.126676] clk_disable_complete: gcc_ufs_phy_aux_clk > [ 8.131109] clk_disable: gcc_ufs_clkref_clk > [ 8.136029] clk_disable_complete: gcc_ufs_clkref_clk > [ 8.140057] clk_unprepare: gcc_ufs_phy_aux_clk > [ 8.145253] clk_unprepare_complete: gcc_ufs_phy_aux_clk > [ 8.149502] clk_unprepare: gcc_ufs_clkref_clk > [ 8.154613] clk_unprepare_complete: gcc_ufs_clkref_clk > [ 8.159160] regulator_disable: name=l2 > [ 8.164327] regulator_disable_complete: name=l2 > [ 8.167935] regulator_disable: name=l1 > [ 8.172432] regulator_disable_complete: name=l1 > [ 8.176173] regulator_disable: name=s7 > [ 8.180668] regulator_disable_complete: name=s7 > [ 8.184413] regulator_disable: name=l20 > [ 8.188955] regulator_disable_complete: name=l20 > [ 8.192627] regulator_disable: name=bob > [ 8.197634] regulator_disable_complete: name=bob > [ 8.201092] regulator_disable: name=l26 > [ 8.206028] regulator_disable_complete: name=l26 > [ 8.209490] regulator_disable: name=s3 > [ 8.214432] regulator_disable_complete: name=s3 > [ 8.217912] regulator_disable: name=s4 > [ 8.222418] regulator_disable_complete: name=s4 > [ 8.226175] clk_disable: gcc_ufs_axi_clk > [ 8.230561] clk_disable_complete: gcc_ufs_axi_clk > [ 8.234744] clk_unprepare: gcc_ufs_axi_clk > [ 8.239335] clk_unprepare_complete: gcc_ufs_axi_clk > [ 8.243349] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: > core_clk disabled > [ 8.248137] clk_disable: gcc_aggre1_ufs_axi_clk > [ 8.256083] clk_disable_complete: gcc_aggre1_ufs_axi_clk > [ 8.260334] clk_disable: ufs_axi_clk_src > [ 8.265883] clk_disable_complete: ufs_axi_clk_src > [ 8.269816] clk_unprepare: gcc_aggre1_ufs_axi_clk > [ 8.274410] clk_unprepare_complete: gcc_aggre1_ufs_axi_clk > [ 8.279100] clk_unprepare: ufs_axi_clk_src > [ 8.284473] clk_unprepare_complete: ufs_axi_clk_src > [ 8.288565] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: > bus_aggr_clk disabled > [ 8.293363] clk_disable: gcc_ufs_ahb_clk > [ 8.301649] clk_disable_complete: gcc_ufs_ahb_clk > [ 8.305577] clk_unprepare: gcc_ufs_ahb_clk > [ 8.310168] clk_unprepare_complete: gcc_ufs_ahb_clk > [ 8.314169] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: > iface_clk disabled > [ 8.318969] clk_disable: gcc_ufs_unipro_core_clk > [ 8.326918] clk_disable_complete: gcc_ufs_unipro_core_clk > [ 8.331605] clk_disable: ufs_unipro_core_clk_src > [ 8.336894] clk_disable_complete: ufs_unipro_core_clk_src > [ 8.341586] clk_disable: gpll0_out_main > [ 8.346867] clk_disable_complete: gpll0_out_main > [ 8.350523] clk_disable: gpll0 > [ 8.355378] clk_disable_complete: gpll0 > [ 8.358270] clk_unprepare: gcc_ufs_unipro_core_clk > [ 8.361996] clk_unprepare_complete: gcc_ufs_unipro_core_clk > [ 8.366859] clk_unprepare: ufs_unipro_core_clk_src > [ 8.372324] clk_unprepare_complete: ufs_unipro_core_clk_src > [ 8.377190] clk_unprepare: gpll0_out_main > [ 8.382650] clk_unprepare_complete: gpll0_out_main > [ 8.386818] clk_unprepare: gpll0 > [ 8.391494] clk_unprepare_complete: gpll0 > [ 8.394896] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: > core_clk_unipro disabled > [ 8.398835] clk_disable: gcc_ufs_ice_core_clk > [ 8.406949] clk_disable_complete: gcc_ufs_ice_core_clk > [ 8.411478] clk_unprepare: gcc_ufs_ice_core_clk > [ 8.416505] clk_unprepare_complete: gcc_ufs_ice_core_clk > [ 8.420945] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: > core_clk_ice disabled > [ 8.426519] clk_disable: bb_clk1 > [ 8.434543] clk_disable_complete: bb_clk1 > [ 8.437772] clk_unprepare: bb_clk1 > [ 8.441849] clk_unprepare_complete: bb_clk1 > [ 8.444993] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: > ref_clk disabled > [ 8.449092] clk_disable: gcc_ufs_tx_symbol_0_clk > [ 8.456693] clk_disable_complete: gcc_ufs_tx_symbol_0_clk > [ 8.461570] clk_unprepare: gcc_ufs_tx_symbol_0_clk > [ 8.466857] clk_unprepare_complete: gcc_ufs_tx_symbol_0_clk > [ 8.471548] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: > tx_lane0_sync_clk disabled > [ 8.477045] clk_disable: gcc_ufs_rx_symbol_0_clk > [ 8.485683] clk_disable_complete: gcc_ufs_rx_symbol_0_clk > [ 8.490401] clk_unprepare: gcc_ufs_rx_symbol_0_clk > [ 8.495677] clk_unprepare_complete: gcc_ufs_rx_symbol_0_clk > [ 8.500371] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: > rx_lane0_sync_clk disabled > [ 8.505862] clk_disable: gcc_ufs_rx_symbol_1_clk > [ 8.514501] clk_disable_complete: gcc_ufs_rx_symbol_1_clk > [ 8.519204] clk_unprepare: gcc_ufs_rx_symbol_1_clk > [ 8.524492] clk_unprepare_complete: gcc_ufs_rx_symbol_1_clk > [ 8.529189] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: > rx_lane1_sync_clk disabled > [ 8.534700] ufshcd_profile_clk_gating: 1da4000.ufshc: off: took 308518 > usecs, err 0 > [ 8.543382] ufshcd_init: 1da4000.ufshc: took 5246387 usecs, dev_state: > UFS_ACTIVE_PWR_MODE, link_state: UIC_LINK_ACTIVE_STATE, err -11 > [ 8.565181] Freeing unused kernel memory: 9792K >
