On 03/19/2018 09:50 PM, Sinan Kaya wrote:
> Code includes barrier() followed by writel(). writel() already has a
> barrier
> on some architectures like arm64.
>
> This ends up CPU observing two barriers back to back before executing the
> register write.
>
> Since code already has an explicit barrier call, changing writeX() to
> writeX_relaxed().
>
> Signed-off-by: Sinan Kaya <okaya@xxxxxxxxxxxxxx>
> ---
> drivers/scsi/ipr.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c
> index e07dd99..209adac 100644
> --- a/drivers/scsi/ipr.c
> +++ b/drivers/scsi/ipr.c
> @@ -762,9 +762,9 @@ static void ipr_mask_and_clear_interrupts(struct ipr_ioa_cfg *ioa_cfg,
>
> /* Set interrupt mask to stop all new interrupts */
> if (ioa_cfg->sis64)
> - writeq(~0, ioa_cfg->regs.set_interrupt_mask_reg);
> + writeq_relaxed(~0, ioa_cfg->regs.set_interrupt_mask_reg);
> else
> - writel(~0, ioa_cfg->regs.set_interrupt_mask_reg);
> + writel_relaxed(~0, ioa_cfg->regs.set_interrupt_mask_reg);
>
> /* Clear any pending interrupts */
> if (ioa_cfg->sis64)
> @@ -8435,7 +8435,8 @@ static int ipr_reset_enable_ioa(struct ipr_cmnd *ipr_cmd)
> wmb();
> if (ioa_cfg->sis64) {
> /* Set the adapter to the correct endian mode. */
> - writel(IPR_ENDIAN_SWAP_KEY, ioa_cfg->regs.endian_swap_reg);
> + writel_relaxed(IPR_ENDIAN_SWAP_KEY,
> + ioa_cfg->regs.endian_swap_reg);
> int_reg = readl(ioa_cfg->regs.endian_swap_reg);
> }
>
Looks fine to me. Thanks.
Acked-by: Brian King <brking@xxxxxxxxxxxxxxxxxx>
--
Brian King
Power Linux I/O
IBM Linux Technology Center
