Re: [PATCH v2 01/14] mpt3sas: Bug fix for big endian systems.

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Chaitra,

A few comments:

> @@ -426,7 +427,7 @@ static void _clone_sg_entries(struct MPT3SAS_ADAPTER *ioc,
>  			dst_addr_phys = _base_get_chain_phys(ioc,
>  						smid, sge_chain_count);
>  			WARN_ON(dst_addr_phys > U32_MAX);
> -			sgel->Address = (u32)dst_addr_phys;
> +			sgel->Address = cpu_to_le32((u32)dst_addr_phys);

I tend to prefer lower_32_bits() but that's your choice.

> @@ -3040,8 +3047,9 @@ mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc)
>  		}
>  
>  		for (i = 0; i < ioc->combined_reply_index_count; i++) {
> -			ioc->replyPostRegisterIndex[i] = (resource_size_t *)
> -			     ((u8 *)&ioc->chip->Doorbell +
> +			ioc->replyPostRegisterIndex[i] =
> +			    (volatile void __iomem *)
> +			     ((u8 __force *)&ioc->chip->Doorbell +
>  			     MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET +
>  			     (i * MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET));

Do you really need volatile here? The existing resource_size_t didn't
imply volatile.

Why the double type casts? You've already changed replyPostRegisterIndex
to be 'volatile void __iomem **' in the header file. So why not:

                        ioc->replyPostRegisterIndex[i] =
                                &ioc->chip->Doorbell +
                                MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET +
                                i * MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET;

Also looks like ioc->reply_post_host_index handling a few lines further
down could lose the type casts.

> @@ -3386,7 +3394,7 @@ _base_put_smid_mpi_ep_scsi_io(struct MPT3SAS_ADAPTER *ioc, u16 smid, u16 handle)
>  	__le32 *mfp = (__le32 *)mpt3sas_base_get_msg_frame(ioc, smid);
>  
>  	_clone_sg_entries(ioc, (void *) mfp, smid);
> -	mpi_req_iomem = (void *)ioc->chip +
> +	mpi_req_iomem = (void __force *)ioc->chip +
>  			MPI_FRAME_START_OFFSET + (smid * ioc->request_sz);
>  	_base_clone_mpi_to_sys_mem(mpi_req_iomem, (void *)mfp,
>  					ioc->request_sz);

Wouldn't it be better to add __iomem to the definition of mpi_req_iomem?

> +		nvme_encap_request->ErrorResponseBaseAddress =
> +		    cpu_to_le64(ioc->sense_dma & 0xFFFFFFFF00000000UL);

upper_32_bits()?

-- 
Martin K. Petersen	Oracle Linux Engineering



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