On 2018-02-09 10:29, Rob Herring wrote:
On Mon, Feb 05, 2018 at 08:02:07PM +0800, Can Guo wrote:
From: Gilad Broner <gbroner@xxxxxxxxxxxxxx>
Different platforms may have different number of lanes for the UFS
link.
Add parameter to device tree specifying how many lanes should be
configured for the UFS link. And don't print err message for clocks
that are optional, this leads to unnecessary confusion about failure.
Signed-off-by: Gilad Broner <gbroner@xxxxxxxxxxxxxx>
Signed-off-by: Subhash Jadavani <subhashj@xxxxxxxxxxxxxx>
Signed-off-by: Can Guo <cang@xxxxxxxxxxxxxx>
diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
index 5357919..4cee3f9 100644
--- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
+++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
@@ -31,6 +31,9 @@ Optional properties:
defined or a value in the array is "0" then it is assumed
that the frequency is set by the parent clock or a
fixed rate clock source.
+- lanes-per-direction: number of lanes available per direction -
either 1 or 2.
+ Note that it is assume same number of lanes is used both
directions at once.
Seems reasonable until someone does not make things symmetrical. We
should design for that case.
You are right, I will make changes like using lanes-tx and lanes-rx for
Tx/Rx links for asymmetrial senarios and upload V2 patch
+ If not specified, default is 2 lanes per direction.
Note: If above properties are not defined it can be assumed that the
supply
regulators or clocks are always on.