On Mon, 8 May 2017, David Woodhouse wrote: > > [Issue is, if you powerdown during erase, you get "weakly erased" > > page, which will contain expected 0xff's, but you'll get bitflips > > there quickly. Similar issue exists for writes. It is solveable in > > software, just hard and slow... and we don't do it.] > > It's not that hard. We certainly do it in JFFS2. I was fairly sure that > it was also part of the design considerations for UBI ? it really ought > to be right there too. I'm less sure about UBIFS but I would have > expected it to be OK. I've got a problem with the underlying mechanism. How long does it take to erase a NAND block? A couple of milliseconds. That means that for an erase to be "weak" du to a power fail, the host CPU must issue an erase command, and then the power to the NAND must drop within those milliseconds. However, in most systems there will be a power monitor which will essentially reset the CPU as soon as the power starts dropping. So in practice, by the time the voltage is too low to successfully supply the NAND chip, the CPU has already been reset, hence, no reset command will have been given by the time NAND runs out of steam. Sure, with switchmode power supplies, we don't have those large capacitors in the power supply which can keep the power going for a second or more, but still, I would think that the power wouldn't die fast enough for this to be an issue. But I could very well be wrong and I haven't had experience with that many NAND flash systems. But then please tell me where the above reasoning is flawed. /Ricard -- Ricard Wolf Wanderlöf ricardw(at)axis.com Axis Communications AB, Lund, Sweden www.axis.com Phone +46 46 272 2016 Fax +46 46 13 61 30
