On Thu, Apr 20, 2017 at 7:58 AM, Martin K. Petersen <martin.petersen@xxxxxxxxxx> wrote: > Sinan Kaya <okaya@xxxxxxxxxxxxxx> writes: > >> Due to relaxed ordering requirements on multiple architectures, >> drivers are required to use wmb/rmb/mb combinations when they need to >> guarantee observability between the memory and the HW. >> >> The mpt3sas driver is already using wmb() for this purpose. However, >> it issues a writel following wmb(). writel() function on arm/arm64 >> arhictectures have an embedded wmb() call inside. [Sreekanth] Whether same thing applicable for SPARC & POWER architectures. If yes then we are fine with this patch changes. >> >> This results in unnecessary performance loss and code duplication. >> >> writel already guarantees ordering for both cpu and bus. we don't need >> additional wmb() > > Broadcom folks, please review! > > -- > Martin K. Petersen Oracle Linux Engineering