On Mon, 2006-05-15 at 03:25 -0400, Jeff Garzik wrote: > Arjan van de Ven wrote: > > On Mon, 2006-05-15 at 14:22 +0800, HighPoint Linux Team wrote: > >> Could you give more explanation about pci posting flush? When (and why) do we need it? > > > > pci posting is where the chipset internally delays (posts) writes (as > > done by writel and such) to see if more writes will come that can then > > be combined into one burst. While in practice these queues are finite > > (and often have a timeout) it's bad practice to depend on that. The > > simplest way to flush out this posting is to do a (dummy) readl() from > > the same device. (alternative is to do dma from the device to ram, but > > readl() is a lot easier ;) > > > >> In an old posting (http://lkml.org/lkml/2003/5/8/278) said pci posting flush is unnecessary - is it correct? > > > > no not really, not as a general statement. > > ACK. > > Generally speaking, readl() is the best way to ensure that all writes > have been flushed across various layers of PCI bridges, etc. > > It is particularly important to get this right if you are issuing a > delay (i.e. udelay) after a write. If the write is not guaranteed to be > flushed at the time the delay begins, then you are no longer truly > delaying for the time requested. another typical case is at io submission or when you disable irqs in the hardware.. - : send the line "unsubscribe linux-scsi" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
