Re: [PATCH 1/7] clk: samsung: exynos3250: fix PLL rates

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On Fri, Feb 16, 2018 at 11:00 AM, Sylwester Nawrocki
<s.nawrocki@xxxxxxxxxxx> wrote:
> On 02/13/2018 03:41 PM, Krzysztof Kozlowski wrote:
>> On Tue, Feb 13, 2018 at 2:40 PM, Andrzej Hajda <a.hajda@xxxxxxxxxxx> wrote:
>>> Declared rates did not match rates generated by PLL.
>>> As a result driver behaved inconsitently.
>>>
>>> Signed-off-by: Andrzej Hajda <a.hajda@xxxxxxxxxxx>
>>> ---
>>>  drivers/clk/samsung/clk-exynos3250.c | 4 ++--
>>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> How about marking these cc-stable and adding fixes tag?
>
> It may potentially cause regressions so I would rather not back port it
> to older kernels. This applies to all patches in this series, except 7/7.

Hm, existing (old) values were more-or-less tested already, so indeed
sounds reasonable.

BR,
Krzysztof
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