Add nodes for PRNG in dts files decribing Exynos5 chips.
Signed-off-by: Łukasz Stelmach <l.stelmach@xxxxxxxxxxx>
---
Changes since v2:
- Rebased according to Krzysztof Kozłowski's request.
Changes since v1:
- Use "rng" as the node-name for all RNG regardles of their type.
- Introduce "samsung,exynos5250-prng" compatible (binding documentation
will follow).
arch/arm/boot/dts/exynos5.dtsi | 6 ++++++
arch/arm/boot/dts/exynos5250.dtsi | 5 +++++
arch/arm/boot/dts/exynos5410.dtsi | 5 +++++
arch/arm/boot/dts/exynos5420.dtsi | 5 +++++
4 files changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index 347224589451..a7eb74617be4 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -211,11 +211,17 @@
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
};
+ prng: rng@10830400 {
+ compatible = "samsung,exynos5250-prng";
+ reg = <0x10830400 0x200>;
+ };
+
g2d: g2d@10850000 {
compatible = "samsung,exynos5250-g2d";
reg = <0x10850000 0x1000>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
+
};
};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 232d8801d9e0..e55748798845 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -1061,6 +1061,11 @@
pinctrl-0 = <&i2c3_bus>;
};
+&prng {
+ clocks = <&clock CLK_SSS>;
+ clock-names = "secss";
+};
+
&pwm {
clocks = <&clock CLK_PWM>;
clock-names = "timers";
diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi
index 7b34970e6ac7..f5541000606b 100644
--- a/arch/arm/boot/dts/exynos5410.dtsi
+++ b/arch/arm/boot/dts/exynos5410.dtsi
@@ -333,6 +333,11 @@
clock-names = "fin_pll", "mct";
};
+&prng {
+ clocks = <&clock CLK_SSS>;
+ clock-names = "secss";
+};
+
&pwm {
clocks = <&clock CLK_PWM>;
clock-names = "timers";
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index a44aec348502..3611f5c05235 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -1429,6 +1429,11 @@
clock-names = "fin_pll", "mct";
};
+&prng {
+ clocks = <&clock CLK_SSS>;
+ clock-names = "secss";
+};
+
&pwm {
clocks = <&clock CLK_PWM>;
clock-names = "timers";
--
2.11.0
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